diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine')
65 files changed, 273 insertions, 4136 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild index 2e48b0816670..ddcf8782d6b6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild @@ -17,8 +17,6 @@ include $(src)/nvkm/engine/msppp/Kbuild include $(src)/nvkm/engine/msvld/Kbuild include $(src)/nvkm/engine/nvenc/Kbuild include $(src)/nvkm/engine/nvdec/Kbuild -include $(src)/nvkm/engine/nvjpg/Kbuild -include $(src)/nvkm/engine/ofa/Kbuild include $(src)/nvkm/engine/sec/Kbuild include $(src)/nvkm/engine/sec2/Kbuild include $(src)/nvkm/engine/sw/Kbuild diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild index 165d61fc5d6c..9754bac65df7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild @@ -10,5 +10,4 @@ nvkm-y += nvkm/engine/ce/gv100.o nvkm-y += nvkm/engine/ce/tu102.o nvkm-y += nvkm/engine/ce/ga100.o nvkm-y += nvkm/engine/ce/ga102.o - -nvkm-y += nvkm/engine/ce/r535.o +nvkm-y += nvkm/engine/ce/gb202.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.c index 9427a592bd16..1c0c60138706 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.c @@ -90,7 +90,7 @@ ga100_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_engine **pengine) { if (nvkm_gsp_rm(device->gsp)) - return r535_ce_new(&ga100_ce, device, type, inst, pengine); + return -ENODEV; return nvkm_engine_new_(&ga100_ce, device, type, inst, true, pengine); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga102.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga102.c index ce56ede7c2e9..9359c5e7aa3a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga102.c @@ -44,7 +44,7 @@ ga102_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_engine **pengine) { if (nvkm_gsp_rm(device->gsp)) - return r535_ce_new(&ga102_ce, device, type, inst, pengine); + return -ENODEV; return nvkm_engine_new_(&ga102_ce, device, type, inst, true, pengine); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gb202.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gb202.c new file mode 100644 index 000000000000..37c3c619c71b --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gb202.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: MIT + * + * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. + */ +#include "priv.h" + +#include <nvhw/drf.h> +#include <nvhw/ref/gb202/dev_ce.h> + +u32 +gb202_ce_grce_mask(struct nvkm_device *device) +{ + u32 data = nvkm_rd32(device, NV_CE_GRCE_MASK); + + return NVVAL_GET(data, NV_CE, GRCE_MASK, VALUE); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h index 806a76a72249..34fd2657134b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h @@ -16,4 +16,6 @@ int ga100_ce_oneinit(struct nvkm_engine *); int ga100_ce_init(struct nvkm_engine *); int ga100_ce_fini(struct nvkm_engine *, bool); int ga100_ce_nonstall(struct nvkm_engine *); + +u32 gb202_ce_grce_mask(struct nvkm_device *); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/r535.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/r535.c deleted file mode 100644 index bd0d435dbbd3..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/r535.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <core/object.h> -#include <subdev/gsp.h> -#include <engine/fifo.h> - -#include <nvrm/nvtypes.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/class/cl2080_notification.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/class/clc0b5sw.h> - -struct r535_ce_obj { - struct nvkm_object object; - struct nvkm_gsp_object rm; -}; - -static void * -r535_ce_obj_dtor(struct nvkm_object *object) -{ - struct r535_ce_obj *obj = container_of(object, typeof(*obj), object); - - nvkm_gsp_rm_free(&obj->rm); - return obj; -} - -static const struct nvkm_object_func -r535_ce_obj = { - .dtor = r535_ce_obj_dtor, -}; - -static int -r535_ce_obj_ctor(const struct nvkm_oclass *oclass, void *argv, u32 argc, - struct nvkm_object **pobject) -{ - struct nvkm_chan *chan = nvkm_uchan_chan(oclass->parent); - struct r535_ce_obj *obj; - NVC0B5_ALLOCATION_PARAMETERS *args; - - if (!(obj = kzalloc(sizeof(*obj), GFP_KERNEL))) - return -ENOMEM; - - nvkm_object_ctor(&r535_ce_obj, oclass, &obj->object); - *pobject = &obj->object; - - args = nvkm_gsp_rm_alloc_get(&chan->rm.object, oclass->handle, oclass->base.oclass, - sizeof(*args), &obj->rm); - if (WARN_ON(IS_ERR(args))) - return PTR_ERR(args); - - args->version = 1; - args->engineType = NV2080_ENGINE_TYPE_COPY0 + oclass->engine->subdev.inst; - - return nvkm_gsp_rm_alloc_wr(&obj->rm, args); -} - -static void * -r535_ce_dtor(struct nvkm_engine *engine) -{ - kfree(engine->func); - return engine; -} - -int -r535_ce_new(const struct nvkm_engine_func *hw, struct nvkm_device *device, - enum nvkm_subdev_type type, int inst, struct nvkm_engine **pengine) -{ - struct nvkm_engine_func *rm; - int nclass, ret; - - for (nclass = 0; hw->sclass[nclass].oclass; nclass++); - - if (!(rm = kzalloc(sizeof(*rm) + (nclass + 1) * sizeof(rm->sclass[0]), GFP_KERNEL))) - return -ENOMEM; - - rm->dtor = r535_ce_dtor; - for (int i = 0; i < nclass; i++) { - rm->sclass[i].minver = hw->sclass[i].minver; - rm->sclass[i].maxver = hw->sclass[i].maxver; - rm->sclass[i].oclass = hw->sclass[i].oclass; - rm->sclass[i].ctor = r535_ce_obj_ctor; - } - - ret = nvkm_engine_new_(rm, device, type, inst, true, pengine); - if (ret) - kfree(rm); - - return ret; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c index 7c8647dcb349..67d0545cf902 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c @@ -40,7 +40,7 @@ tu102_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_engine **pengine) { if (nvkm_gsp_rm(device->gsp)) - return r535_ce_new(&tu102_ce, device, type, inst, pengine); + return -ENODEV; return nvkm_engine_new_(&tu102_ce, device, type, inst, true, pengine); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 9093d89b16f3..3375a59ebf1a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -2529,9 +2529,6 @@ nv170_chipset = { .vfn = { 0x00000001, ga100_vfn_new }, .ce = { 0x000003ff, ga100_ce_new }, .fifo = { 0x00000001, ga100_fifo_new }, - .nvdec = { 0x0000001f, ga100_nvdec_new }, - .nvjpg = { 0x00000001, ga100_nvjpg_new }, - .ofa = { 0x00000001, ga100_ofa_new }, }; static const struct nvkm_device_chip @@ -2561,8 +2558,6 @@ nv172_chipset = { .fifo = { 0x00000001, ga102_fifo_new }, .gr = { 0x00000001, ga102_gr_new }, .nvdec = { 0x00000003, ga102_nvdec_new }, - .nvenc = { 0x00000001, ga102_nvenc_new }, - .ofa = { 0x00000001, ga102_ofa_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2593,8 +2588,6 @@ nv173_chipset = { .fifo = { 0x00000001, ga102_fifo_new }, .gr = { 0x00000001, ga102_gr_new }, .nvdec = { 0x00000003, ga102_nvdec_new }, - .nvenc = { 0x00000001, ga102_nvenc_new }, - .ofa = { 0x00000001, ga102_ofa_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2625,8 +2618,6 @@ nv174_chipset = { .fifo = { 0x00000001, ga102_fifo_new }, .gr = { 0x00000001, ga102_gr_new }, .nvdec = { 0x00000003, ga102_nvdec_new }, - .nvenc = { 0x00000001, ga102_nvenc_new }, - .ofa = { 0x00000001, ga102_ofa_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2657,8 +2648,6 @@ nv176_chipset = { .fifo = { 0x00000001, ga102_fifo_new }, .gr = { 0x00000001, ga102_gr_new }, .nvdec = { 0x00000003, ga102_nvdec_new }, - .nvenc = { 0x00000001, ga102_nvenc_new }, - .ofa = { 0x00000001, ga102_ofa_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2689,12 +2678,26 @@ nv177_chipset = { .fifo = { 0x00000001, ga102_fifo_new }, .gr = { 0x00000001, ga102_gr_new }, .nvdec = { 0x00000003, ga102_nvdec_new }, - .nvenc = { 0x00000001, ga102_nvenc_new }, - .ofa = { 0x00000001, ga102_ofa_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; static const struct nvkm_device_chip +nv180_chipset = { + .name = "GH100", + .bar = { 0x00000001, tu102_bar_new }, + .fault = { 0x00000001, tu102_fault_new }, + .fb = { 0x00000001, gh100_fb_new }, + .fsp = { 0x00000001, gh100_fsp_new }, + .gsp = { 0x00000001, gh100_gsp_new }, + .imem = { 0x00000001, gh100_instmem_new }, + .mmu = { 0x00000001, gh100_mmu_new }, + .pci = { 0x00000001, gh100_pci_new }, + .timer = { 0x00000001, gk20a_timer_new }, + .vfn = { 0x00000001, ga100_vfn_new }, + .fifo = { 0x00000001, ga102_fifo_new }, +}; + +static const struct nvkm_device_chip nv192_chipset = { .name = "AD102", .bar = { 0x00000001, tu102_bar_new }, @@ -2709,14 +2712,9 @@ nv192_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .vfn = { 0x00000001, ga100_vfn_new }, .ce = { 0x0000001f, ga102_ce_new }, - .disp = { 0x00000001, ad102_disp_new }, + .disp = { 0x00000001, ga102_disp_new }, .dma = { 0x00000001, gv100_dma_new }, .fifo = { 0x00000001, ga102_fifo_new }, - .gr = { 0x00000001, ad102_gr_new }, - .nvdec = { 0x0000000f, ad102_nvdec_new }, - .nvenc = { 0x00000007, ad102_nvenc_new }, - .nvjpg = { 0x0000000f, ad102_nvjpg_new }, - .ofa = { 0x00000001, ad102_ofa_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2735,14 +2733,9 @@ nv193_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .vfn = { 0x00000001, ga100_vfn_new }, .ce = { 0x0000001f, ga102_ce_new }, - .disp = { 0x00000001, ad102_disp_new }, + .disp = { 0x00000001, ga102_disp_new }, .dma = { 0x00000001, gv100_dma_new }, .fifo = { 0x00000001, ga102_fifo_new }, - .gr = { 0x00000001, ad102_gr_new }, - .nvdec = { 0x0000000f, ad102_nvdec_new }, - .nvenc = { 0x00000007, ad102_nvenc_new }, - .nvjpg = { 0x0000000f, ad102_nvjpg_new }, - .ofa = { 0x00000001, ad102_ofa_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2761,14 +2754,9 @@ nv194_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .vfn = { 0x00000001, ga100_vfn_new }, .ce = { 0x0000001f, ga102_ce_new }, - .disp = { 0x00000001, ad102_disp_new }, + .disp = { 0x00000001, ga102_disp_new }, .dma = { 0x00000001, gv100_dma_new }, .fifo = { 0x00000001, ga102_fifo_new }, - .gr = { 0x00000001, ad102_gr_new }, - .nvdec = { 0x0000000f, ad102_nvdec_new }, - .nvenc = { 0x00000007, ad102_nvenc_new }, - .nvjpg = { 0x0000000f, ad102_nvjpg_new }, - .ofa = { 0x00000001, ad102_ofa_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2787,14 +2775,9 @@ nv196_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .vfn = { 0x00000001, ga100_vfn_new }, .ce = { 0x0000001f, ga102_ce_new }, - .disp = { 0x00000001, ad102_disp_new }, + .disp = { 0x00000001, ga102_disp_new }, .dma = { 0x00000001, gv100_dma_new }, .fifo = { 0x00000001, ga102_fifo_new }, - .gr = { 0x00000001, ad102_gr_new }, - .nvdec = { 0x0000000f, ad102_nvdec_new }, - .nvenc = { 0x00000007, ad102_nvenc_new }, - .nvjpg = { 0x0000000f, ad102_nvjpg_new }, - .ofa = { 0x00000001, ad102_ofa_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2813,17 +2796,122 @@ nv197_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .vfn = { 0x00000001, ga100_vfn_new }, .ce = { 0x0000001f, ga102_ce_new }, - .disp = { 0x00000001, ad102_disp_new }, + .disp = { 0x00000001, ga102_disp_new }, .dma = { 0x00000001, gv100_dma_new }, .fifo = { 0x00000001, ga102_fifo_new }, - .gr = { 0x00000001, ad102_gr_new }, - .nvdec = { 0x0000000f, ad102_nvdec_new }, - .nvenc = { 0x00000007, ad102_nvenc_new }, - .nvjpg = { 0x0000000f, ad102_nvjpg_new }, - .ofa = { 0x00000001, ad102_ofa_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; +static const struct nvkm_device_chip +nv1a0_chipset = { + .name = "GB100", + .bar = { 0x00000001, tu102_bar_new }, + .fb = { 0x00000001, gb100_fb_new }, + .fsp = { 0x00000001, gb100_fsp_new }, + .gsp = { 0x00000001, gb100_gsp_new }, + .imem = { 0x00000001, gh100_instmem_new }, + .mmu = { 0x00000001, gh100_mmu_new }, + .pci = { 0x00000001, gh100_pci_new }, + .timer = { 0x00000001, gk20a_timer_new }, + .vfn = { 0x00000001, ga100_vfn_new }, + .fifo = { 0x00000001, ga102_fifo_new }, +}; + +static const struct nvkm_device_chip +nv1a2_chipset = { + .name = "GB102", + .bar = { 0x00000001, tu102_bar_new }, + .fb = { 0x00000001, gb100_fb_new }, + .fsp = { 0x00000001, gb100_fsp_new }, + .gsp = { 0x00000001, gb100_gsp_new }, + .imem = { 0x00000001, gh100_instmem_new }, + .mmu = { 0x00000001, gh100_mmu_new }, + .pci = { 0x00000001, gh100_pci_new }, + .timer = { 0x00000001, gk20a_timer_new }, + .vfn = { 0x00000001, ga100_vfn_new }, + .fifo = { 0x00000001, ga102_fifo_new }, +}; + +static const struct nvkm_device_chip +nv1b2_chipset = { + .name = "GB202", + .bar = { 0x00000001, tu102_bar_new }, + .fb = { 0x00000001, gb202_fb_new }, + .fsp = { 0x00000001, gb202_fsp_new }, + .gsp = { 0x00000001, gb202_gsp_new }, + .imem = { 0x00000001, gh100_instmem_new }, + .mmu = { 0x00000001, gh100_mmu_new }, + .pci = { 0x00000001, gh100_pci_new }, + .timer = { 0x00000001, gk20a_timer_new }, + .vfn = { 0x00000001, ga100_vfn_new }, + .disp = { 0x00000001, ga102_disp_new }, + .fifo = { 0x00000001, ga102_fifo_new }, +}; + +static const struct nvkm_device_chip +nv1b3_chipset = { + .name = "GB203", + .bar = { 0x00000001, tu102_bar_new }, + .fb = { 0x00000001, gb202_fb_new }, + .fsp = { 0x00000001, gb202_fsp_new }, + .gsp = { 0x00000001, gb202_gsp_new }, + .imem = { 0x00000001, gh100_instmem_new }, + .mmu = { 0x00000001, gh100_mmu_new }, + .pci = { 0x00000001, gh100_pci_new }, + .timer = { 0x00000001, gk20a_timer_new }, + .vfn = { 0x00000001, ga100_vfn_new }, + .disp = { 0x00000001, ga102_disp_new }, + .fifo = { 0x00000001, ga102_fifo_new }, +}; + +static const struct nvkm_device_chip +nv1b5_chipset = { + .name = "GB205", + .bar = { 0x00000001, tu102_bar_new }, + .fb = { 0x00000001, gb202_fb_new }, + .fsp = { 0x00000001, gb202_fsp_new }, + .gsp = { 0x00000001, gb202_gsp_new }, + .imem = { 0x00000001, gh100_instmem_new }, + .mmu = { 0x00000001, gh100_mmu_new }, + .pci = { 0x00000001, gh100_pci_new }, + .timer = { 0x00000001, gk20a_timer_new }, + .vfn = { 0x00000001, ga100_vfn_new }, + .disp = { 0x00000001, ga102_disp_new }, + .fifo = { 0x00000001, ga102_fifo_new }, +}; + +static const struct nvkm_device_chip +nv1b6_chipset = { + .name = "GB206", + .bar = { 0x00000001, tu102_bar_new }, + .fb = { 0x00000001, gb202_fb_new }, + .fsp = { 0x00000001, gb202_fsp_new }, + .gsp = { 0x00000001, gb202_gsp_new }, + .imem = { 0x00000001, gh100_instmem_new }, + .mmu = { 0x00000001, gh100_mmu_new }, + .pci = { 0x00000001, gh100_pci_new }, + .timer = { 0x00000001, gk20a_timer_new }, + .vfn = { 0x00000001, ga100_vfn_new }, + .disp = { 0x00000001, ga102_disp_new }, + .fifo = { 0x00000001, ga102_fifo_new }, +}; + +static const struct nvkm_device_chip +nv1b7_chipset = { + .name = "GB207", + .bar = { 0x00000001, tu102_bar_new }, + .fb = { 0x00000001, gb202_fb_new }, + .fsp = { 0x00000001, gb202_fsp_new }, + .gsp = { 0x00000001, gb202_gsp_new }, + .imem = { 0x00000001, gh100_instmem_new }, + .mmu = { 0x00000001, gh100_mmu_new }, + .pci = { 0x00000001, gh100_pci_new }, + .timer = { 0x00000001, gk20a_timer_new }, + .vfn = { 0x00000001, ga100_vfn_new }, + .disp = { 0x00000001, ga102_disp_new }, + .fifo = { 0x00000001, ga102_fifo_new }, +}; + struct nvkm_subdev * nvkm_device_subdev(struct nvkm_device *device, int type, int inst) { @@ -3065,8 +3153,8 @@ nvkm_device_ctor(const struct nvkm_device_func *func, device->debug = nvkm_dbgopt(device->dbgopt, "device"); INIT_LIST_HEAD(&device->subdev); - mmio_base = device->func->resource_addr(device, 0); - mmio_size = device->func->resource_size(device, 0); + mmio_base = device->func->resource_addr(device, NVKM_BAR0_PRI); + mmio_size = device->func->resource_size(device, NVKM_BAR0_PRI); device->pri = ioremap(mmio_base, mmio_size); if (device->pri == NULL) { @@ -3139,7 +3227,10 @@ nvkm_device_ctor(const struct nvkm_device_func *func, case 0x140: device->card_type = GV100; break; case 0x160: device->card_type = TU100; break; case 0x170: device->card_type = GA100; break; + case 0x180: device->card_type = GH100; break; case 0x190: device->card_type = AD100; break; + case 0x1a0: device->card_type = GB10x; break; + case 0x1b0: device->card_type = GB20x; break; default: break; } @@ -3242,11 +3333,19 @@ nvkm_device_ctor(const struct nvkm_device_func *func, case 0x174: device->chip = &nv174_chipset; break; case 0x176: device->chip = &nv176_chipset; break; case 0x177: device->chip = &nv177_chipset; break; + case 0x180: device->chip = &nv180_chipset; break; case 0x192: device->chip = &nv192_chipset; break; case 0x193: device->chip = &nv193_chipset; break; case 0x194: device->chip = &nv194_chipset; break; case 0x196: device->chip = &nv196_chipset; break; case 0x197: device->chip = &nv197_chipset; break; + case 0x1a0: device->chip = &nv1a0_chipset; break; + case 0x1a2: device->chip = &nv1a2_chipset; break; + case 0x1b2: device->chip = &nv1b2_chipset; break; + case 0x1b3: device->chip = &nv1b3_chipset; break; + case 0x1b5: device->chip = &nv1b5_chipset; break; + case 0x1b6: device->chip = &nv1b6_chipset; break; + case 0x1b7: device->chip = &nv1b7_chipset; break; default: if (nvkm_boolopt(device->cfgopt, "NvEnableUnsupportedChipsets", false)) { switch (device->chipset) { diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c index 3ff6436007fa..8f0261a0d618 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c @@ -1560,18 +1560,42 @@ nvkm_device_pci(struct nvkm_device *device) return container_of(device, struct nvkm_device_pci, device); } +static int +nvkm_device_pci_resource_idx(struct nvkm_device_pci *pdev, enum nvkm_bar_id bar) +{ + int idx = 0; + + if (bar == NVKM_BAR0_PRI) + return idx; + + idx += (pci_resource_flags(pdev->pdev, idx) & IORESOURCE_MEM_64) ? 2 : 1; + if (bar == NVKM_BAR1_FB) + return idx; + + idx += (pci_resource_flags(pdev->pdev, idx) & IORESOURCE_MEM_64) ? 2 : 1; + if (bar == NVKM_BAR2_INST) + return idx; + + WARN_ON(1); + return -1; +} + static resource_size_t -nvkm_device_pci_resource_addr(struct nvkm_device *device, unsigned bar) +nvkm_device_pci_resource_addr(struct nvkm_device *device, enum nvkm_bar_id bar) { struct nvkm_device_pci *pdev = nvkm_device_pci(device); - return pci_resource_start(pdev->pdev, bar); + int idx = nvkm_device_pci_resource_idx(pdev, bar); + + return idx >= 0 ? pci_resource_start(pdev->pdev, idx) : 0; } static resource_size_t -nvkm_device_pci_resource_size(struct nvkm_device *device, unsigned bar) +nvkm_device_pci_resource_size(struct nvkm_device *device, enum nvkm_bar_id bar) { struct nvkm_device_pci *pdev = nvkm_device_pci(device); - return pci_resource_len(pdev->pdev, bar); + int idx = nvkm_device_pci_resource_idx(pdev, bar); + + return idx >= 0 ? pci_resource_len(pdev->pdev, idx) : 0; } static int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h index e42b18820a95..75ee7506d443 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h @@ -11,6 +11,7 @@ #include <subdev/devinit.h> #include <subdev/fault.h> #include <subdev/fb.h> +#include <subdev/fsp.h> #include <subdev/fuse.h> #include <subdev/gpio.h> #include <subdev/gsp.h> @@ -43,8 +44,6 @@ #include <engine/msvld.h> #include <engine/nvenc.h> #include <engine/nvdec.h> -#include <engine/nvjpg.h> -#include <engine/ofa.h> #include <engine/sec.h> #include <engine/sec2.h> #include <engine/sw.h> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c index 78a83f904bbd..114e50ca1827 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c @@ -186,21 +186,31 @@ nvkm_device_tegra(struct nvkm_device *device) } static struct resource * -nvkm_device_tegra_resource(struct nvkm_device *device, unsigned bar) +nvkm_device_tegra_resource(struct nvkm_device *device, enum nvkm_bar_id bar) { struct nvkm_device_tegra *tdev = nvkm_device_tegra(device); - return platform_get_resource(tdev->pdev, IORESOURCE_MEM, bar); + int idx; + + switch (bar) { + case NVKM_BAR0_PRI: idx = 0; break; + case NVKM_BAR1_FB : idx = 1; break; + default: + WARN_ON(1); + return NULL; + } + + return platform_get_resource(tdev->pdev, IORESOURCE_MEM, idx); } static resource_size_t -nvkm_device_tegra_resource_addr(struct nvkm_device *device, unsigned bar) +nvkm_device_tegra_resource_addr(struct nvkm_device *device, enum nvkm_bar_id bar) { struct resource *res = nvkm_device_tegra_resource(device, bar); return res ? res->start : 0; } static resource_size_t -nvkm_device_tegra_resource_size(struct nvkm_device *device, unsigned bar) +nvkm_device_tegra_resource_size(struct nvkm_device *device, enum nvkm_bar_id bar) { struct resource *res = nvkm_device_tegra_resource(device, bar); return res ? resource_size(res) : 0; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c index d7f75b3a43c8..58191b7a0494 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c @@ -148,6 +148,9 @@ nvkm_udevice_info(struct nvkm_udevice *udev, void *data, u32 size) case TU100: args->v0.family = NV_DEVICE_INFO_V0_TURING; break; case GA100: args->v0.family = NV_DEVICE_INFO_V0_AMPERE; break; case AD100: args->v0.family = NV_DEVICE_INFO_V0_ADA; break; + case GH100: args->v0.family = NV_DEVICE_INFO_V0_HOPPER; break; + case GB10x: args->v0.family = NV_DEVICE_INFO_V0_BLACKWELL; break; + case GB20x: args->v0.family = NV_DEVICE_INFO_V0_BLACKWELL; break; default: args->v0.family = 0; break; @@ -209,8 +212,8 @@ nvkm_udevice_map(struct nvkm_object *object, void *argv, u32 argc, struct nvkm_udevice *udev = nvkm_udevice(object); struct nvkm_device *device = udev->device; *type = NVKM_OBJECT_MAP_IO; - *addr = device->func->resource_addr(device, 0); - *size = device->func->resource_size(device, 0); + *addr = device->func->resource_addr(device, NVKM_BAR0_PRI); + *size = device->func->resource_size(device, NVKM_BAR0_PRI); return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild index e346e924fee8..e1aecd3fe96c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild @@ -27,9 +27,6 @@ nvkm-y += nvkm/engine/disp/gp102.o nvkm-y += nvkm/engine/disp/gv100.o nvkm-y += nvkm/engine/disp/tu102.o nvkm-y += nvkm/engine/disp/ga102.o -nvkm-y += nvkm/engine/disp/ad102.o - -nvkm-y += nvkm/engine/disp/r535.o nvkm-y += nvkm/engine/disp/udisp.o nvkm-y += nvkm/engine/disp/uconn.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c deleted file mode 100644 index 7f300a79aa29..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" -#include "chan.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct nvkm_disp_func -ad102_disp = { - .uevent = &gv100_disp_chan_uevent, - .ramht_size = 0x2000, - .root = { 0, 0,AD102_DISP }, - .user = { - {{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new }, - {{ 0, 0,GA102_DISP_CURSOR }, nvkm_disp_chan_new, &gv100_disp_curs }, - {{ 0, 0,GA102_DISP_WINDOW_IMM_CHANNEL_DMA}, nvkm_disp_wndw_new, &gv100_disp_wimm }, - {{ 0, 0,AD102_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gv100_disp_core }, - {{ 0, 0,GA102_DISP_WINDOW_CHANNEL_DMA }, nvkm_disp_wndw_new, &gv100_disp_wndw }, - {} - }, -}; - -int -ad102_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_disp **pdisp) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_disp_new(&ad102_disp, device, type, inst, pdisp); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c index 4e43ee383c34..9b84e357d354 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c @@ -49,7 +49,7 @@ nvkm_disp_chan_map(struct nvkm_object *object, void *argv, u32 argc, { struct nvkm_disp_chan *chan = nvkm_disp_chan(object); struct nvkm_device *device = chan->disp->engine.subdev.device; - const u64 base = device->func->resource_addr(device, 0); + const u64 base = device->func->resource_addr(device, NVKM_BAR0_PRI); *type = NVKM_OBJECT_MAP_IO; *addr = base + chan->func->user(chan, size); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c index cfa3698d3a2f..614921166fba 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c @@ -805,7 +805,7 @@ gv100_disp_caps_map(struct nvkm_object *object, void *argv, u32 argc, struct gv100_disp_caps *caps = gv100_disp_caps(object); struct nvkm_device *device = caps->disp->engine.subdev.device; *type = NVKM_OBJECT_MAP_IO; - *addr = 0x640000 + device->func->resource_addr(device, 0); + *addr = 0x640000 + device->func->resource_addr(device, NVKM_BAR0_PRI); *size = 0x1000; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c deleted file mode 100644 index 99110ab2f44d..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c +++ /dev/null @@ -1,1725 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" -#include "chan.h" -#include "conn.h" -#include "dp.h" -#include "head.h" -#include "ior.h" -#include "outp.h" - -#include <core/ramht.h> -#include <subdev/bios.h> -#include <subdev/bios/conn.h> -#include <subdev/gsp.h> -#include <subdev/mmu.h> -#include <subdev/vfn.h> - -#include <nvhw/drf.h> - -#include <nvrm/nvtypes.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/class/cl2080_notification.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073specific.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/nvos.h> -#include <nvrm/535.113.01/nvidia/generated/g_allclasses.h> -#include <nvrm/535.113.01/nvidia/generated/g_mem_desc_nvoc.h> -#include <nvrm/535.113.01/nvidia/inc/kernel/os/nv_memory_type.h> - -#include <linux/acpi.h> - -static u64 -r535_chan_user(struct nvkm_disp_chan *chan, u64 *psize) -{ - switch (chan->object.oclass & 0xff) { - case 0x7d: *psize = 0x10000; return 0x680000; - case 0x7e: *psize = 0x01000; return 0x690000 + (chan->head * *psize); - case 0x7b: *psize = 0x01000; return 0x6b0000 + (chan->head * *psize); - case 0x7a: *psize = 0x01000; return 0x6d8000 + (chan->head * *psize); - default: - BUG_ON(1); - break; - } - - return 0ULL; -} - -static void -r535_chan_intr(struct nvkm_disp_chan *chan, bool en) -{ -} - -static void -r535_chan_fini(struct nvkm_disp_chan *chan) -{ - nvkm_gsp_rm_free(&chan->rm.object); -} - -static int -r535_chan_push(struct nvkm_disp_chan *chan) -{ - struct nvkm_gsp *gsp = chan->disp->engine.subdev.device->gsp; - NV2080_CTRL_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&gsp->internal.device.subdevice, - NV2080_CTRL_CMD_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - if (chan->memory) { - switch (nvkm_memory_target(chan->memory)) { - case NVKM_MEM_TARGET_NCOH: - ctrl->addressSpace = ADDR_SYSMEM; - ctrl->cacheSnoop = 0; - break; - case NVKM_MEM_TARGET_HOST: - ctrl->addressSpace = ADDR_SYSMEM; - ctrl->cacheSnoop = 1; - break; - case NVKM_MEM_TARGET_VRAM: - ctrl->addressSpace = ADDR_FBMEM; - break; - default: - WARN_ON(1); - return -EINVAL; - } - - ctrl->physicalAddr = nvkm_memory_addr(chan->memory); - ctrl->limit = nvkm_memory_size(chan->memory) - 1; - } - - ctrl->hclass = chan->object.oclass; - ctrl->channelInstance = chan->head; - ctrl->valid = ((chan->object.oclass & 0xff) != 0x7a) ? 1 : 0; - - return nvkm_gsp_rm_ctrl_wr(&gsp->internal.device.subdevice, ctrl); -} - -static int -r535_curs_init(struct nvkm_disp_chan *chan) -{ - NV50VAIO_CHANNELPIO_ALLOCATION_PARAMETERS *args; - int ret; - - ret = r535_chan_push(chan); - if (ret) - return ret; - - args = nvkm_gsp_rm_alloc_get(&chan->disp->rm.object, - (chan->object.oclass << 16) | chan->head, - chan->object.oclass, sizeof(*args), &chan->rm.object); - if (IS_ERR(args)) - return PTR_ERR(args); - - args->channelInstance = chan->head; - - return nvkm_gsp_rm_alloc_wr(&chan->rm.object, args); -} - -static const struct nvkm_disp_chan_func -r535_curs_func = { - .init = r535_curs_init, - .fini = r535_chan_fini, - .intr = r535_chan_intr, - .user = r535_chan_user, -}; - -static const struct nvkm_disp_chan_user -r535_curs = { - .func = &r535_curs_func, - .user = 73, -}; - -static int -r535_dmac_bind(struct nvkm_disp_chan *chan, struct nvkm_object *object, u32 handle) -{ - return nvkm_ramht_insert(chan->disp->ramht, object, chan->chid.user, -9, handle, - chan->chid.user << 25 | - (chan->disp->rm.client.object.handle & 0x3fff)); -} - -static void -r535_dmac_fini(struct nvkm_disp_chan *chan) -{ - struct nvkm_device *device = chan->disp->engine.subdev.device; - const u32 uoff = (chan->chid.user - 1) * 0x1000; - - chan->suspend_put = nvkm_rd32(device, 0x690000 + uoff); - r535_chan_fini(chan); -} - -static int -r535_dmac_init(struct nvkm_disp_chan *chan) -{ - NV50VAIO_CHANNELDMA_ALLOCATION_PARAMETERS *args; - int ret; - - ret = r535_chan_push(chan); - if (ret) - return ret; - - args = nvkm_gsp_rm_alloc_get(&chan->disp->rm.object, - (chan->object.oclass << 16) | chan->head, - chan->object.oclass, sizeof(*args), &chan->rm.object); - if (IS_ERR(args)) - return PTR_ERR(args); - - args->channelInstance = chan->head; - args->offset = chan->suspend_put; - - return nvkm_gsp_rm_alloc_wr(&chan->rm.object, args); -} - -static int -r535_dmac_push(struct nvkm_disp_chan *chan, u64 memory) -{ - chan->memory = nvkm_umem_search(chan->object.client, memory); - if (IS_ERR(chan->memory)) - return PTR_ERR(chan->memory); - - return 0; -} - -static const struct nvkm_disp_chan_func -r535_dmac_func = { - .push = r535_dmac_push, - .init = r535_dmac_init, - .fini = r535_dmac_fini, - .intr = r535_chan_intr, - .user = r535_chan_user, - .bind = r535_dmac_bind, -}; - -static const struct nvkm_disp_chan_func -r535_wimm_func = { - .push = r535_dmac_push, - .init = r535_dmac_init, - .fini = r535_dmac_fini, - .intr = r535_chan_intr, - .user = r535_chan_user, -}; - -static const struct nvkm_disp_chan_user -r535_wimm = { - .func = &r535_wimm_func, - .user = 33, -}; - -static const struct nvkm_disp_chan_user -r535_wndw = { - .func = &r535_dmac_func, - .user = 1, -}; - -static void -r535_core_fini(struct nvkm_disp_chan *chan) -{ - struct nvkm_device *device = chan->disp->engine.subdev.device; - - chan->suspend_put = nvkm_rd32(device, 0x680000); - r535_chan_fini(chan); -} - -static const struct nvkm_disp_chan_func -r535_core_func = { - .push = r535_dmac_push, - .init = r535_dmac_init, - .fini = r535_core_fini, - .intr = r535_chan_intr, - .user = r535_chan_user, - .bind = r535_dmac_bind, -}; - -static const struct nvkm_disp_chan_user -r535_core = { - .func = &r535_core_func, - .user = 0, -}; - -static int -r535_sor_bl_set(struct nvkm_ior *sor, int lvl) -{ - struct nvkm_disp *disp = sor->disp; - NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_SET_BACKLIGHT_BRIGHTNESS, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->displayId = BIT(sor->asy.outp->index); - ctrl->brightness = lvl; - - return nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl); -} - -static int -r535_sor_bl_get(struct nvkm_ior *sor) -{ - struct nvkm_disp *disp = sor->disp; - NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *ctrl; - int ret, lvl; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_GET_BACKLIGHT_BRIGHTNESS, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->displayId = BIT(sor->asy.outp->index); - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; - } - - lvl = ctrl->brightness; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return lvl; -} - -static const struct nvkm_ior_func_bl -r535_sor_bl = { - .get = r535_sor_bl_get, - .set = r535_sor_bl_set, -}; - -static void -r535_sor_hda_eld(struct nvkm_ior *sor, int head, u8 *data, u8 size) -{ - struct nvkm_disp *disp = sor->disp; - NV0073_CTRL_DFP_SET_ELD_AUDIO_CAP_PARAMS *ctrl; - - if (WARN_ON(size > sizeof(ctrl->bufferELD))) - return; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DFP_SET_ELD_AUDIO_CAPS, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return; - - ctrl->displayId = BIT(sor->asy.outp->index); - ctrl->numELDSize = size; - memcpy(ctrl->bufferELD, data, size); - ctrl->maxFreqSupported = 0; //XXX - ctrl->ctrl = NVDEF(NV0073, CTRL_DFP_ELD_AUDIO_CAPS_CTRL, PD, TRUE); - ctrl->ctrl |= NVDEF(NV0073, CTRL_DFP_ELD_AUDIO_CAPS_CTRL, ELDV, TRUE); - ctrl->deviceEntry = head; - - WARN_ON(nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl)); -} - -static void -r535_sor_hda_hpd(struct nvkm_ior *sor, int head, bool present) -{ - struct nvkm_disp *disp = sor->disp; - NV0073_CTRL_DFP_SET_ELD_AUDIO_CAP_PARAMS *ctrl; - - if (present) - return; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DFP_SET_ELD_AUDIO_CAPS, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return; - - ctrl->displayId = BIT(sor->asy.outp->index); - ctrl->deviceEntry = head; - - WARN_ON(nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl)); -} - -static const struct nvkm_ior_func_hda -r535_sor_hda = { - .hpd = r535_sor_hda_hpd, - .eld = r535_sor_hda_eld, -}; - -static void -r535_sor_dp_audio_mute(struct nvkm_ior *sor, bool mute) -{ - struct nvkm_disp *disp = sor->disp; - NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DP_SET_AUDIO_MUTESTREAM, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return; - - ctrl->displayId = BIT(sor->asy.outp->index); - ctrl->mute = mute; - WARN_ON(nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl)); -} - -static void -r535_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) -{ - struct nvkm_disp *disp = sor->disp; - NV0073_CTRL_DFP_SET_AUDIO_ENABLE_PARAMS *ctrl; - - if (!enable) - r535_sor_dp_audio_mute(sor, true); - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DFP_SET_AUDIO_ENABLE, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return; - - ctrl->displayId = BIT(sor->asy.outp->index); - ctrl->enable = enable; - WARN_ON(nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl)); - - if (enable) - r535_sor_dp_audio_mute(sor, false); -} - -static void -r535_sor_dp_vcpi(struct nvkm_ior *sor, int head, u8 slot, u8 slot_nr, u16 pbn, u16 aligned_pbn) -{ - struct nvkm_disp *disp = sor->disp; - struct NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DP_CONFIG_STREAM, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return; - - ctrl->subDeviceInstance = 0; - ctrl->head = head; - ctrl->sorIndex = sor->id; - ctrl->dpLink = sor->asy.link == 2; - ctrl->bEnableOverride = 1; - ctrl->bMST = 1; - ctrl->hBlankSym = 0; - ctrl->vBlankSym = 0; - ctrl->colorFormat = 0; - ctrl->bEnableTwoHeadOneOr = 0; - ctrl->singleHeadMultistreamMode = 0; - ctrl->MST.slotStart = slot; - ctrl->MST.slotEnd = slot + slot_nr - 1; - ctrl->MST.PBN = pbn; - ctrl->MST.Timeslice = aligned_pbn; - ctrl->MST.sendACT = 0; - ctrl->MST.singleHeadMSTPipeline = 0; - ctrl->MST.bEnableAudioOverRightPanel = 0; - WARN_ON(nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl)); -} - -static int -r535_sor_dp_sst(struct nvkm_ior *sor, int head, bool ef, - u32 watermark, u32 hblanksym, u32 vblanksym) -{ - struct nvkm_disp *disp = sor->disp; - struct NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DP_CONFIG_STREAM, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->subDeviceInstance = 0; - ctrl->head = head; - ctrl->sorIndex = sor->id; - ctrl->dpLink = sor->asy.link == 2; - ctrl->bEnableOverride = 1; - ctrl->bMST = 0; - ctrl->hBlankSym = hblanksym; - ctrl->vBlankSym = vblanksym; - ctrl->colorFormat = 0; - ctrl->bEnableTwoHeadOneOr = 0; - ctrl->SST.bEnhancedFraming = ef; - ctrl->SST.tuSize = 64; - ctrl->SST.waterMark = watermark; - ctrl->SST.bEnableAudioOverRightPanel = 0; - return nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl); -} - -static const struct nvkm_ior_func_dp -r535_sor_dp = { - .sst = r535_sor_dp_sst, - .vcpi = r535_sor_dp_vcpi, - .audio = r535_sor_dp_audio, -}; - -static void -r535_sor_hdmi_scdc(struct nvkm_ior *sor, u32 khz, bool support, bool scrambling, - bool scrambling_low_rates) -{ - struct nvkm_outp *outp = sor->asy.outp; - struct nvkm_disp *disp = outp->disp; - NV0073_CTRL_SPECIFIC_SET_HDMI_SINK_CAPS_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_SINK_CAPS, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return; - - ctrl->displayId = BIT(outp->index); - ctrl->caps = 0; - if (support) - ctrl->caps |= NVDEF(NV0073_CTRL_CMD_SPECIFIC, SET_HDMI_SINK_CAPS, SCDC_SUPPORTED, TRUE); - if (scrambling) - ctrl->caps |= NVDEF(NV0073_CTRL_CMD_SPECIFIC, SET_HDMI_SINK_CAPS, GT_340MHZ_CLOCK_SUPPORTED, TRUE); - if (scrambling_low_rates) - ctrl->caps |= NVDEF(NV0073_CTRL_CMD_SPECIFIC, SET_HDMI_SINK_CAPS, LTE_340MHZ_SCRAMBLING_SUPPORTED, TRUE); - - WARN_ON(nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl)); -} - -static void -r535_sor_hdmi_ctrl_audio_mute(struct nvkm_outp *outp, bool mute) -{ - struct nvkm_disp *disp = outp->disp; - NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_AUDIO_MUTESTREAM_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_AUDIO_MUTESTREAM, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return; - - ctrl->displayId = BIT(outp->index); - ctrl->mute = mute; - WARN_ON(nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl)); -} - -static void -r535_sor_hdmi_ctrl_audio(struct nvkm_outp *outp, bool enable) -{ - struct nvkm_disp *disp = outp->disp; - NV0073_CTRL_SPECIFIC_SET_OD_PACKET_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_SET_OD_PACKET, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return; - - ctrl->displayId = BIT(outp->index); - ctrl->transmitControl = - NVDEF(NV0073_CTRL_SPECIFIC, SET_OD_PACKET_TRANSMIT_CONTROL, ENABLE, YES) | - NVDEF(NV0073_CTRL_SPECIFIC, SET_OD_PACKET_TRANSMIT_CONTROL, OTHER_FRAME, DISABLE) | - NVDEF(NV0073_CTRL_SPECIFIC, SET_OD_PACKET_TRANSMIT_CONTROL, SINGLE_FRAME, DISABLE) | - NVDEF(NV0073_CTRL_SPECIFIC, SET_OD_PACKET_TRANSMIT_CONTROL, ON_HBLANK, DISABLE) | - NVDEF(NV0073_CTRL_SPECIFIC, SET_OD_PACKET_TRANSMIT_CONTROL, VIDEO_FMT, SW_CONTROLLED) | - NVDEF(NV0073_CTRL_SPECIFIC, SET_OD_PACKET_TRANSMIT_CONTROL, RESERVED_LEGACY_MODE, NO); - ctrl->packetSize = 10; - ctrl->aPacket[0] = 0x03; - ctrl->aPacket[1] = 0x00; - ctrl->aPacket[2] = 0x00; - ctrl->aPacket[3] = enable ? 0x10 : 0x01; - ctrl->aPacket[4] = 0x00; - ctrl->aPacket[5] = 0x00; - ctrl->aPacket[6] = 0x00; - ctrl->aPacket[7] = 0x00; - ctrl->aPacket[8] = 0x00; - ctrl->aPacket[9] = 0x00; - WARN_ON(nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl)); -} - -static void -r535_sor_hdmi_audio(struct nvkm_ior *sor, int head, bool enable) -{ - struct nvkm_device *device = sor->disp->engine.subdev.device; - const u32 hdmi = head * 0x400; - - r535_sor_hdmi_ctrl_audio(sor->asy.outp, enable); - r535_sor_hdmi_ctrl_audio_mute(sor->asy.outp, !enable); - - /* General Control (GCP). */ - nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000); - nvkm_wr32(device, 0x6f00cc + hdmi, !enable ? 0x00000001 : 0x00000010); - nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000001); -} - -static void -r535_sor_hdmi_ctrl(struct nvkm_ior *sor, int head, bool enable, u8 max_ac_packet, u8 rekey) -{ - struct nvkm_disp *disp = sor->disp; - NV0073_CTRL_SPECIFIC_SET_HDMI_ENABLE_PARAMS *ctrl; - - if (!enable) - return; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_ENABLE, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return; - - ctrl->displayId = BIT(sor->asy.outp->index); - ctrl->enable = enable; - - WARN_ON(nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl)); -} - -static const struct nvkm_ior_func_hdmi -r535_sor_hdmi = { - .ctrl = r535_sor_hdmi_ctrl, - .scdc = r535_sor_hdmi_scdc, - /*TODO: SF_USER -> KMS. */ - .infoframe_avi = gv100_sor_hdmi_infoframe_avi, - .infoframe_vsi = gv100_sor_hdmi_infoframe_vsi, - .audio = r535_sor_hdmi_audio, -}; - -static const struct nvkm_ior_func -r535_sor = { - .hdmi = &r535_sor_hdmi, - .dp = &r535_sor_dp, - .hda = &r535_sor_hda, - .bl = &r535_sor_bl, -}; - -static int -r535_sor_new(struct nvkm_disp *disp, int id) -{ - return nvkm_ior_new_(&r535_sor, disp, SOR, id, true/*XXX: hda cap*/); -} - -static int -r535_sor_cnt(struct nvkm_disp *disp, unsigned long *pmask) -{ - *pmask = 0xf; - return 4; -} - -static void -r535_head_vblank_put(struct nvkm_head *head) -{ - struct nvkm_device *device = head->disp->engine.subdev.device; - - nvkm_mask(device, 0x611d80 + (head->id * 4), 0x00000002, 0x00000000); -} - -static void -r535_head_vblank_get(struct nvkm_head *head) -{ - struct nvkm_device *device = head->disp->engine.subdev.device; - - nvkm_wr32(device, 0x611800 + (head->id * 4), 0x00000002); - nvkm_mask(device, 0x611d80 + (head->id * 4), 0x00000002, 0x00000002); -} - -static void -r535_head_state(struct nvkm_head *head, struct nvkm_head_state *state) -{ -} - -static const struct nvkm_head_func -r535_head = { - .state = r535_head_state, - .vblank_get = r535_head_vblank_get, - .vblank_put = r535_head_vblank_put, -}; - -static struct nvkm_conn * -r535_conn_new(struct nvkm_disp *disp, u32 id) -{ - NV0073_CTRL_SPECIFIC_GET_CONNECTOR_DATA_PARAMS *ctrl; - struct nvbios_connE dcbE = {}; - struct nvkm_conn *conn; - int ret, index; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_GET_CONNECTOR_DATA, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return (void *)ctrl; - - ctrl->subDeviceInstance = 0; - ctrl->displayId = BIT(id); - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ERR_PTR(ret); - } - - list_for_each_entry(conn, &disp->conns, head) { - if (conn->index == ctrl->data[0].index) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return conn; - } - } - - dcbE.type = ctrl->data[0].type; - index = ctrl->data[0].index; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - - ret = nvkm_conn_new(disp, index, &dcbE, &conn); - if (ret) - return ERR_PTR(ret); - - list_add_tail(&conn->head, &disp->conns); - return conn; -} - -static void -r535_outp_release(struct nvkm_outp *outp) -{ - outp->disp->rm.assigned_sors &= ~BIT(outp->ior->id); - outp->ior->asy.outp = NULL; - outp->ior = NULL; -} - -static int -r535_outp_acquire(struct nvkm_outp *outp, bool hda) -{ - struct nvkm_disp *disp = outp->disp; - struct nvkm_ior *ior; - NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS *ctrl; - int ret, or; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DFP_ASSIGN_SOR, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->subDeviceInstance = 0; - ctrl->displayId = BIT(outp->index); - ctrl->sorExcludeMask = disp->rm.assigned_sors; - if (hda) - ctrl->flags |= NVDEF(NV0073_CTRL, DFP_ASSIGN_SOR_FLAGS, AUDIO, OPTIMAL); - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; - } - - for (or = 0; or < ARRAY_SIZE(ctrl->sorAssignListWithTag); or++) { - if (ctrl->sorAssignListWithTag[or].displayMask & BIT(outp->index)) { - disp->rm.assigned_sors |= BIT(or); - break; - } - } - - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - - if (WARN_ON(or == ARRAY_SIZE(ctrl->sorAssignListWithTag))) - return -EINVAL; - - ior = nvkm_ior_find(disp, SOR, or); - if (WARN_ON(!ior)) - return -EINVAL; - - nvkm_outp_acquire_ior(outp, NVKM_OUTP_USER, ior); - return 0; -} - -static int -r535_disp_head_displayid(struct nvkm_disp *disp, int head, u32 *displayid) -{ - NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS *ctrl; - int ret; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SYSTEM_GET_ACTIVE, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->subDeviceInstance = 0; - ctrl->head = head; - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; - } - - *displayid = ctrl->displayId; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return 0; -} - -static struct nvkm_ior * -r535_outp_inherit(struct nvkm_outp *outp) -{ - struct nvkm_disp *disp = outp->disp; - struct nvkm_head *head; - u32 displayid; - int ret; - - list_for_each_entry(head, &disp->heads, head) { - ret = r535_disp_head_displayid(disp, head->id, &displayid); - if (WARN_ON(ret)) - return NULL; - - if (displayid == BIT(outp->index)) { - NV0073_CTRL_SPECIFIC_OR_GET_INFO_PARAMS *ctrl; - u32 id, proto; - struct nvkm_ior *ior; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_OR_GET_INFO, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return NULL; - - ctrl->subDeviceInstance = 0; - ctrl->displayId = displayid; - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return NULL; - } - - id = ctrl->index; - proto = ctrl->protocol; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - - ior = nvkm_ior_find(disp, SOR, id); - if (WARN_ON(!ior)) - return NULL; - - switch (proto) { - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_A: - ior->arm.proto = TMDS; - ior->arm.link = 1; - break; - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_B: - ior->arm.proto = TMDS; - ior->arm.link = 2; - break; - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_DUAL_TMDS: - ior->arm.proto = TMDS; - ior->arm.link = 3; - break; - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_DP_A: - ior->arm.proto = DP; - ior->arm.link = 1; - break; - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_DP_B: - ior->arm.proto = DP; - ior->arm.link = 2; - break; - default: - WARN_ON(1); - return NULL; - } - - ior->arm.proto_evo = proto; - ior->arm.head = BIT(head->id); - disp->rm.assigned_sors |= BIT(ior->id); - return ior; - } - } - - return NULL; -} - -static int -r535_outp_dfp_get_info(struct nvkm_outp *outp) -{ - NV0073_CTRL_DFP_GET_INFO_PARAMS *ctrl; - struct nvkm_disp *disp = outp->disp; - int ret; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, NV0073_CTRL_CMD_DFP_GET_INFO, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->displayId = BIT(outp->index); - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; - } - - nvkm_debug(&disp->engine.subdev, "DFP %08x: flags:%08x flags2:%08x\n", - ctrl->displayId, ctrl->flags, ctrl->flags2); - - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return 0; -} - -static int -r535_outp_detect(struct nvkm_outp *outp) -{ - NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS *ctrl; - struct nvkm_disp *disp = outp->disp; - int ret; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SYSTEM_GET_CONNECT_STATE, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->subDeviceInstance = 0; - ctrl->displayMask = BIT(outp->index); - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; - } - - if (ctrl->displayMask & BIT(outp->index)) { - ret = r535_outp_dfp_get_info(outp); - if (ret == 0) - ret = 1; - } else { - ret = 0; - } - - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; -} - -static int -r535_dp_mst_id_put(struct nvkm_outp *outp, u32 id) -{ - NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS *ctrl; - struct nvkm_disp *disp = outp->disp; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->subDeviceInstance = 0; - ctrl->displayId = id; - return nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl); -} - -static int -r535_dp_mst_id_get(struct nvkm_outp *outp, u32 *pid) -{ - NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS *ctrl; - struct nvkm_disp *disp = outp->disp; - int ret; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->subDeviceInstance = 0; - ctrl->displayId = BIT(outp->index); - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; - } - - *pid = ctrl->displayIdAssigned; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return 0; -} - -static int -r535_dp_drive(struct nvkm_outp *outp, u8 lanes, u8 pe[4], u8 vs[4]) -{ - NV0073_CTRL_DP_LANE_DATA_PARAMS *ctrl; - struct nvkm_disp *disp = outp->disp; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DP_SET_LANE_DATA, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->displayId = BIT(outp->index); - ctrl->numLanes = lanes; - for (int i = 0; i < lanes; i++) - ctrl->data[i] = NVVAL(NV0073_CTRL, DP_LANE_DATA, PREEMPHASIS, pe[i]) | - NVVAL(NV0073_CTRL, DP_LANE_DATA, DRIVECURRENT, vs[i]); - - return nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl); -} - -static int -r535_dp_train_target(struct nvkm_outp *outp, u8 target, bool mst, u8 link_nr, u8 link_bw) -{ - struct nvkm_disp *disp = outp->disp; - NV0073_CTRL_DP_CTRL_PARAMS *ctrl; - int ret, retries; - u32 cmd, data; - - cmd = NVDEF(NV0073_CTRL, DP_CMD, SET_LANE_COUNT, TRUE) | - NVDEF(NV0073_CTRL, DP_CMD, SET_LINK_BW, TRUE) | - NVDEF(NV0073_CTRL, DP_CMD, TRAIN_PHY_REPEATER, YES); - data = NVVAL(NV0073_CTRL, DP_DATA, SET_LANE_COUNT, link_nr) | - NVVAL(NV0073_CTRL, DP_DATA, SET_LINK_BW, link_bw) | - NVVAL(NV0073_CTRL, DP_DATA, TARGET, target); - - if (mst) - cmd |= NVDEF(NV0073_CTRL, DP_CMD, SET_FORMAT_MODE, MULTI_STREAM); - - if (outp->dp.dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP) - cmd |= NVDEF(NV0073_CTRL, DP_CMD, SET_ENHANCED_FRAMING, TRUE); - - if (target == 0 && - (outp->dp.dpcd[DPCD_RC02] & 0x20) && - !(outp->dp.dpcd[DPCD_RC03] & DPCD_RC03_TPS4_SUPPORTED)) - cmd |= NVDEF(NV0073_CTRL, DP_CMD, POST_LT_ADJ_REQ_GRANTED, YES); - - /* We should retry up to 3 times, but only if GSP asks politely */ - for (retries = 0; retries < 3; ++retries) { - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, NV0073_CTRL_CMD_DP_CTRL, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->subDeviceInstance = 0; - ctrl->displayId = BIT(outp->index); - ctrl->retryTimeMs = 0; - ctrl->cmd = cmd; - ctrl->data = data; - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if ((ret == -EAGAIN || ret == -EBUSY) && ctrl->retryTimeMs) { - /* - * Device (likely an eDP panel) isn't ready yet, wait for the time specified - * by GSP before retrying again - */ - nvkm_debug(&disp->engine.subdev, - "Waiting %dms for GSP LT panel delay before retrying\n", - ctrl->retryTimeMs); - msleep(ctrl->retryTimeMs); - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - } else { - /* GSP didn't say to retry, or we were successful */ - if (ctrl->err) - ret = -EIO; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - break; - } - } - - return ret; -} - -static int -r535_dp_train(struct nvkm_outp *outp, bool retrain) -{ - for (int target = outp->dp.lttprs; target >= 0; target--) { - int ret = r535_dp_train_target(outp, target, outp->dp.lt.mst, - outp->dp.lt.nr, - outp->dp.lt.bw); - if (ret) - return ret; - } - - return 0; -} - -static int -r535_dp_rates(struct nvkm_outp *outp) -{ - NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS *ctrl; - struct nvkm_disp *disp = outp->disp; - - if (outp->conn->info.type != DCB_CONNECTOR_eDP || - !outp->dp.rates || outp->dp.rate[0].dpcd < 0) - return 0; - - if (WARN_ON(outp->dp.rates > ARRAY_SIZE(ctrl->linkRateTbl))) - return -EINVAL; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->displayId = BIT(outp->index); - for (int i = 0; i < outp->dp.rates; i++) - ctrl->linkRateTbl[outp->dp.rate[i].dpcd] = outp->dp.rate[i].rate * 10 / 200; - - return nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl); -} - -static int -r535_dp_aux_xfer(struct nvkm_outp *outp, u8 type, u32 addr, u8 *data, u8 *psize) -{ - struct nvkm_disp *disp = outp->disp; - NV0073_CTRL_DP_AUXCH_CTRL_PARAMS *ctrl; - u8 size = *psize; - int ret; - int retries; - - for (retries = 0; retries < 3; ++retries) { - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, NV0073_CTRL_CMD_DP_AUXCH_CTRL, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->subDeviceInstance = 0; - ctrl->displayId = BIT(outp->index); - ctrl->bAddrOnly = !size; - ctrl->cmd = type; - if (ctrl->bAddrOnly) { - ctrl->cmd = NVDEF_SET(ctrl->cmd, NV0073_CTRL, DP_AUXCH_CMD, REQ_TYPE, WRITE); - ctrl->cmd = NVDEF_SET(ctrl->cmd, NV0073_CTRL, DP_AUXCH_CMD, I2C_MOT, FALSE); - } - ctrl->addr = addr; - ctrl->size = !ctrl->bAddrOnly ? (size - 1) : 0; - memcpy(ctrl->data, data, size); - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if ((ret == -EAGAIN || ret == -EBUSY) && ctrl->retryTimeMs) { - /* - * Device (likely an eDP panel) isn't ready yet, wait for the time specified - * by GSP before retrying again - */ - nvkm_debug(&disp->engine.subdev, - "Waiting %dms for GSP LT panel delay before retrying in AUX\n", - ctrl->retryTimeMs); - msleep(ctrl->retryTimeMs); - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - } else { - memcpy(data, ctrl->data, size); - *psize = ctrl->size; - ret = ctrl->replyType; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - break; - } - } - return ret; -} - -static int -r535_dp_aux_pwr(struct nvkm_outp *outp, bool pu) -{ - return 0; -} - -static void -r535_dp_release(struct nvkm_outp *outp) -{ - if (!outp->dp.lt.bw) { - if (!WARN_ON(!outp->dp.rates)) - outp->dp.lt.bw = outp->dp.rate[0].rate / 27000; - else - outp->dp.lt.bw = 0x06; - } - - outp->dp.lt.nr = 0; - - r535_dp_train_target(outp, 0, outp->dp.lt.mst, outp->dp.lt.nr, outp->dp.lt.bw); - r535_outp_release(outp); -} - -static int -r535_dp_acquire(struct nvkm_outp *outp, bool hda) -{ - int ret; - - ret = r535_outp_acquire(outp, hda); - if (ret) - return ret; - - return 0; -} - -static const struct nvkm_outp_func -r535_dp = { - .detect = r535_outp_detect, - .inherit = r535_outp_inherit, - .acquire = r535_dp_acquire, - .release = r535_dp_release, - .dp.aux_pwr = r535_dp_aux_pwr, - .dp.aux_xfer = r535_dp_aux_xfer, - .dp.mst_id_get = r535_dp_mst_id_get, - .dp.mst_id_put = r535_dp_mst_id_put, - .dp.rates = r535_dp_rates, - .dp.train = r535_dp_train, - .dp.drive = r535_dp_drive, -}; - -static int -r535_tmds_edid_get(struct nvkm_outp *outp, u8 *data, u16 *psize) -{ - NV0073_CTRL_SPECIFIC_GET_EDID_V2_PARAMS *ctrl; - struct nvkm_disp *disp = outp->disp; - int ret = -E2BIG; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_GET_EDID_V2, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->subDeviceInstance = 0; - ctrl->displayId = BIT(outp->index); - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; - } - - ret = -E2BIG; - if (ctrl->bufferSize <= *psize) { - memcpy(data, ctrl->edidBuffer, ctrl->bufferSize); - *psize = ctrl->bufferSize; - ret = 0; - } - - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; -} - -static const struct nvkm_outp_func -r535_tmds = { - .detect = r535_outp_detect, - .inherit = r535_outp_inherit, - .acquire = r535_outp_acquire, - .release = r535_outp_release, - .edid_get = r535_tmds_edid_get, -}; - -static int -r535_outp_new(struct nvkm_disp *disp, u32 id) -{ - NV0073_CTRL_SPECIFIC_OR_GET_INFO_PARAMS *ctrl; - enum nvkm_ior_proto proto; - struct dcb_output dcbE = {}; - struct nvkm_conn *conn; - struct nvkm_outp *outp; - u8 locn, link = 0; - int ret; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_OR_GET_INFO, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->subDeviceInstance = 0; - ctrl->displayId = BIT(id); - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; - } - - switch (ctrl->type) { - case NV0073_CTRL_SPECIFIC_OR_TYPE_NONE: - return 0; - case NV0073_CTRL_SPECIFIC_OR_TYPE_SOR: - switch (ctrl->protocol) { - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_A: - proto = TMDS; - link = 1; - break; - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_B: - proto = TMDS; - link = 2; - break; - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_DUAL_TMDS: - proto = TMDS; - link = 3; - break; - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_DP_A: - proto = DP; - link = 1; - break; - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_DP_B: - proto = DP; - link = 2; - break; - default: - WARN_ON(1); - return -EINVAL; - } - - break; - default: - WARN_ON(1); - return -EINVAL; - } - - locn = ctrl->location; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - - conn = r535_conn_new(disp, id); - if (IS_ERR(conn)) - return PTR_ERR(conn); - - switch (proto) { - case TMDS: dcbE.type = DCB_OUTPUT_TMDS; break; - case DP: dcbE.type = DCB_OUTPUT_DP; break; - default: - WARN_ON(1); - return -EINVAL; - } - - dcbE.location = locn; - dcbE.connector = conn->index; - dcbE.heads = disp->head.mask; - dcbE.i2c_index = 0xff; - dcbE.link = dcbE.sorconf.link = link; - - if (proto == TMDS) { - ret = nvkm_outp_new_(&r535_tmds, disp, id, &dcbE, &outp); - if (ret) - return ret; - } else { - NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS *ctrl; - bool mst, wm; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DP_GET_CAPS, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->sorIndex = ~0; - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return ret; - } - - switch (NVVAL_GET(ctrl->maxLinkRate, NV0073_CTRL_CMD, DP_GET_CAPS, MAX_LINK_RATE)) { - case NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_1_62: - dcbE.dpconf.link_bw = 0x06; - break; - case NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_2_70: - dcbE.dpconf.link_bw = 0x0a; - break; - case NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_5_40: - dcbE.dpconf.link_bw = 0x14; - break; - case NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_8_10: - dcbE.dpconf.link_bw = 0x1e; - break; - default: - dcbE.dpconf.link_bw = 0x00; - break; - } - - mst = ctrl->bIsMultistreamSupported; - wm = ctrl->bHasIncreasedWatermarkLimits; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - - if (WARN_ON(!dcbE.dpconf.link_bw)) - return -EINVAL; - - dcbE.dpconf.link_nr = 4; - - ret = nvkm_outp_new_(&r535_dp, disp, id, &dcbE, &outp); - if (ret) - return ret; - - outp->dp.mst = mst; - outp->dp.increased_wm = wm; - } - - - outp->conn = conn; - list_add_tail(&outp->head, &disp->outps); - return 0; -} - -static void -r535_disp_irq(struct nvkm_gsp_event *event, void *repv, u32 repc) -{ - struct nvkm_disp *disp = container_of(event, typeof(*disp), rm.irq); - Nv2080DpIrqNotification *irq = repv; - - if (WARN_ON(repc < sizeof(*irq))) - return; - - nvkm_debug(&disp->engine.subdev, "event: dp irq displayId %08x\n", irq->displayId); - - if (irq->displayId) - nvkm_event_ntfy(&disp->rm.event, fls(irq->displayId) - 1, NVKM_DPYID_IRQ); -} - -static void -r535_disp_hpd(struct nvkm_gsp_event *event, void *repv, u32 repc) -{ - struct nvkm_disp *disp = container_of(event, typeof(*disp), rm.hpd); - Nv2080HotplugNotification *hpd = repv; - - if (WARN_ON(repc < sizeof(*hpd))) - return; - - nvkm_debug(&disp->engine.subdev, "event: hpd plug %08x unplug %08x\n", - hpd->plugDisplayMask, hpd->unplugDisplayMask); - - for (int i = 0; i < 31; i++) { - u32 mask = 0; - - if (hpd->plugDisplayMask & BIT(i)) - mask |= NVKM_DPYID_PLUG; - if (hpd->unplugDisplayMask & BIT(i)) - mask |= NVKM_DPYID_UNPLUG; - - if (mask) - nvkm_event_ntfy(&disp->rm.event, i, mask); - } -} - -static const struct nvkm_event_func -r535_disp_event = { -}; - -static void -r535_disp_intr_head_timing(struct nvkm_disp *disp, int head) -{ - struct nvkm_subdev *subdev = &disp->engine.subdev; - struct nvkm_device *device = subdev->device; - u32 stat = nvkm_rd32(device, 0x611c00 + (head * 0x04)); - - if (stat & 0x00000002) { - nvkm_disp_vblank(disp, head); - - nvkm_wr32(device, 0x611800 + (head * 0x04), 0x00000002); - } -} - -static irqreturn_t -r535_disp_intr(struct nvkm_inth *inth) -{ - struct nvkm_disp *disp = container_of(inth, typeof(*disp), engine.subdev.inth); - struct nvkm_subdev *subdev = &disp->engine.subdev; - struct nvkm_device *device = subdev->device; - unsigned long mask = nvkm_rd32(device, 0x611ec0) & 0x000000ff; - int head; - - for_each_set_bit(head, &mask, 8) - r535_disp_intr_head_timing(disp, head); - - return IRQ_HANDLED; -} - -static void -r535_disp_fini(struct nvkm_disp *disp, bool suspend) -{ - if (!disp->engine.subdev.use.enabled) - return; - - nvkm_gsp_rm_free(&disp->rm.object); - - if (!suspend) { - nvkm_gsp_event_dtor(&disp->rm.irq); - nvkm_gsp_event_dtor(&disp->rm.hpd); - nvkm_event_fini(&disp->rm.event); - - nvkm_gsp_rm_free(&disp->rm.objcom); - nvkm_gsp_device_dtor(&disp->rm.device); - nvkm_gsp_client_dtor(&disp->rm.client); - } -} - -static int -r535_disp_init(struct nvkm_disp *disp) -{ - int ret; - - ret = nvkm_gsp_rm_alloc(&disp->rm.device.object, disp->func->root.oclass << 16, - disp->func->root.oclass, 0, &disp->rm.object); - if (ret) - return ret; - - return 0; -} - -static int -r535_disp_oneinit(struct nvkm_disp *disp) -{ - struct nvkm_device *device = disp->engine.subdev.device; - struct nvkm_gsp *gsp = device->gsp; - NV2080_CTRL_INTERNAL_DISPLAY_WRITE_INST_MEM_PARAMS *ctrl; - int ret, i; - - /* RAMIN. */ - ret = nvkm_gpuobj_new(device, 0x10000, 0x10000, false, NULL, &disp->inst); - if (ret) - return ret; - - if (WARN_ON(nvkm_memory_target(disp->inst->memory) != NVKM_MEM_TARGET_VRAM)) - return -EINVAL; - - ctrl = nvkm_gsp_rm_ctrl_get(&gsp->internal.device.subdevice, - NV2080_CTRL_CMD_INTERNAL_DISPLAY_WRITE_INST_MEM, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->instMemPhysAddr = nvkm_memory_addr(disp->inst->memory); - ctrl->instMemSize = nvkm_memory_size(disp->inst->memory); - ctrl->instMemAddrSpace = ADDR_FBMEM; - ctrl->instMemCpuCacheAttr = NV_MEMORY_WRITECOMBINED; - - ret = nvkm_gsp_rm_ctrl_wr(&gsp->internal.device.subdevice, ctrl); - if (ret) - return ret; - - /* OBJs. */ - ret = nvkm_gsp_client_device_ctor(gsp, &disp->rm.client, &disp->rm.device); - if (ret) - return ret; - - ret = nvkm_gsp_rm_alloc(&disp->rm.device.object, 0x00730000, NV04_DISPLAY_COMMON, 0, - &disp->rm.objcom); - if (ret) - return ret; - - { - NV2080_CTRL_INTERNAL_DISPLAY_GET_STATIC_INFO_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_rd(&gsp->internal.device.subdevice, - NV2080_CTRL_CMD_INTERNAL_DISPLAY_GET_STATIC_INFO, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - disp->wndw.mask = ctrl->windowPresentMask; - disp->wndw.nr = fls(disp->wndw.mask); - nvkm_gsp_rm_ctrl_done(&gsp->internal.device.subdevice, ctrl); - } - - /* */ - { -#if defined(CONFIG_ACPI) && defined(CONFIG_X86) - NV2080_CTRL_INTERNAL_INIT_BRIGHTC_STATE_LOAD_PARAMS *ctrl; - struct nvkm_gsp_object *subdevice = &disp->rm.client.gsp->internal.device.subdevice; - - ctrl = nvkm_gsp_rm_ctrl_get(subdevice, - NV2080_CTRL_CMD_INTERNAL_INIT_BRIGHTC_STATE_LOAD, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->status = 0x56; /* NV_ERR_NOT_SUPPORTED */ - - { - const guid_t NBCI_DSM_GUID = - GUID_INIT(0xD4A50B75, 0x65C7, 0x46F7, - 0xBF, 0xB7, 0x41, 0x51, 0x4C, 0xEA, 0x02, 0x44); - u64 NBCI_DSM_REV = 0x00000102; - const guid_t NVHG_DSM_GUID = - GUID_INIT(0x9D95A0A0, 0x0060, 0x4D48, - 0xB3, 0x4D, 0x7E, 0x5F, 0xEA, 0x12, 0x9F, 0xD4); - u64 NVHG_DSM_REV = 0x00000102; - acpi_handle handle = ACPI_HANDLE(device->dev); - - if (handle && acpi_has_method(handle, "_DSM")) { - bool nbci = acpi_check_dsm(handle, &NBCI_DSM_GUID, NBCI_DSM_REV, - 1ULL << 0x00000014); - bool nvhg = acpi_check_dsm(handle, &NVHG_DSM_GUID, NVHG_DSM_REV, - 1ULL << 0x00000014); - - if (nbci || nvhg) { - union acpi_object argv4 = { - .buffer.type = ACPI_TYPE_BUFFER, - .buffer.length = sizeof(ctrl->backLightData), - .buffer.pointer = kmalloc(argv4.buffer.length, GFP_KERNEL), - }, *obj; - - obj = acpi_evaluate_dsm(handle, nbci ? &NBCI_DSM_GUID : &NVHG_DSM_GUID, - 0x00000102, 0x14, &argv4); - if (!obj) { - acpi_handle_info(handle, "failed to evaluate _DSM\n"); - } else { - for (int i = 0; i < obj->package.count; i++) { - union acpi_object *elt = &obj->package.elements[i]; - u32 size; - - if (elt->integer.value & ~0xffffffffULL) - size = 8; - else - size = 4; - - memcpy(&ctrl->backLightData[ctrl->backLightDataSize], &elt->integer.value, size); - ctrl->backLightDataSize += size; - } - - ctrl->status = 0; - ACPI_FREE(obj); - } - - kfree(argv4.buffer.pointer); - } - } - } - - ret = nvkm_gsp_rm_ctrl_wr(subdevice, ctrl); - if (ret) - return ret; -#endif - } - - /* */ - { - NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, - NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ret = nvkm_gsp_rm_ctrl_wr(&disp->rm.objcom, ctrl); - if (ret) - return ret; - } - - /* */ - { - NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_rd(&disp->rm.objcom, - NV0073_CTRL_CMD_SYSTEM_GET_NUM_HEADS, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - disp->head.nr = ctrl->numHeads; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - } - - /* */ - { - NV0073_CTRL_SPECIFIC_GET_ALL_HEAD_MASK_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_rd(&disp->rm.objcom, - NV0073_CTRL_CMD_SPECIFIC_GET_ALL_HEAD_MASK, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - disp->head.mask = ctrl->headMask; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - - for_each_set_bit(i, &disp->head.mask, disp->head.nr) { - ret = nvkm_head_new_(&r535_head, disp, i); - if (ret) - return ret; - } - } - - disp->sor.nr = disp->func->sor.cnt(disp, &disp->sor.mask); - nvkm_debug(&disp->engine.subdev, " SOR(s): %d (%02lx)\n", disp->sor.nr, disp->sor.mask); - for_each_set_bit(i, &disp->sor.mask, disp->sor.nr) { - ret = disp->func->sor.new(disp, i); - if (ret) - return ret; - } - - /* */ - { - NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS *ctrl; - unsigned long mask; - int i; - - ctrl = nvkm_gsp_rm_ctrl_rd(&disp->rm.objcom, - NV0073_CTRL_CMD_SYSTEM_GET_SUPPORTED, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - mask = ctrl->displayMask; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - - for_each_set_bit(i, &mask, 32) { - ret = r535_outp_new(disp, i); - if (ret) - return ret; - } - } - - ret = nvkm_event_init(&r535_disp_event, &gsp->subdev, 3, 32, &disp->rm.event); - if (WARN_ON(ret)) - return ret; - - ret = nvkm_gsp_device_event_ctor(&disp->rm.device, 0x007e0000, NV2080_NOTIFIERS_HOTPLUG, - r535_disp_hpd, &disp->rm.hpd); - if (ret) - return ret; - - ret = nvkm_gsp_device_event_ctor(&disp->rm.device, 0x007e0001, NV2080_NOTIFIERS_DP_IRQ, - r535_disp_irq, &disp->rm.irq); - if (ret) - return ret; - - /* RAMHT. */ - ret = nvkm_ramht_new(device, disp->func->ramht_size ? disp->func->ramht_size : - 0x1000, 0, disp->inst, &disp->ramht); - if (ret) - return ret; - - ret = nvkm_gsp_intr_stall(gsp, disp->engine.subdev.type, disp->engine.subdev.inst); - if (ret < 0) - return ret; - - ret = nvkm_inth_add(&device->vfn->intr, ret, NVKM_INTR_PRIO_NORMAL, &disp->engine.subdev, - r535_disp_intr, &disp->engine.subdev.inth); - if (ret) - return ret; - - nvkm_inth_allow(&disp->engine.subdev.inth); - return 0; -} - -static void -r535_disp_dtor(struct nvkm_disp *disp) -{ - kfree(disp->func); -} - -int -r535_disp_new(const struct nvkm_disp_func *hw, struct nvkm_device *device, - enum nvkm_subdev_type type, int inst, struct nvkm_disp **pdisp) -{ - struct nvkm_disp_func *rm; - int ret; - - if (!(rm = kzalloc(sizeof(*rm) + 6 * sizeof(rm->user[0]), GFP_KERNEL))) - return -ENOMEM; - - rm->dtor = r535_disp_dtor; - rm->oneinit = r535_disp_oneinit; - rm->init = r535_disp_init; - rm->fini = r535_disp_fini; - rm->uevent = hw->uevent; - rm->sor.cnt = r535_sor_cnt; - rm->sor.new = r535_sor_new; - rm->ramht_size = hw->ramht_size; - - rm->root = hw->root; - - for (int i = 0; hw->user[i].ctor; i++) { - switch (hw->user[i].base.oclass & 0xff) { - case 0x73: rm->user[i] = hw->user[i]; break; - case 0x7d: rm->user[i] = hw->user[i]; rm->user[i].chan = &r535_core; break; - case 0x7e: rm->user[i] = hw->user[i]; rm->user[i].chan = &r535_wndw; break; - case 0x7b: rm->user[i] = hw->user[i]; rm->user[i].chan = &r535_wimm; break; - case 0x7a: rm->user[i] = hw->user[i]; rm->user[i].chan = &r535_curs; break; - default: - WARN_ON(1); - continue; - } - } - - ret = nvkm_disp_new_(rm, device, type, inst, pdisp); - if (ret) - kfree(rm); - - mutex_init(&(*pdisp)->super.mutex); //XXX - return ret; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild index aff92848abfe..376e9c3bcb1a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild @@ -25,8 +25,7 @@ nvkm-y += nvkm/engine/fifo/gv100.o nvkm-y += nvkm/engine/fifo/tu102.o nvkm-y += nvkm/engine/fifo/ga100.o nvkm-y += nvkm/engine/fifo/ga102.o - -nvkm-y += nvkm/engine/fifo/r535.o +nvkm-y += nvkm/engine/fifo/gb202.o nvkm-y += nvkm/engine/fifo/ucgrp.o nvkm-y += nvkm/engine/fifo/uchan.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c index 22443fe4a39f..fdffa0391b31 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c @@ -303,7 +303,7 @@ nvkm_fifo_oneinit(struct nvkm_engine *engine) } /* Allocate USERD + BAR1 polling area. */ - if (fifo->func->chan.func->userd->bar == 1) { + if (fifo->func->chan.func->userd->bar == NVKM_BAR1_FB) { struct nvkm_vmm *bar1 = nvkm_bar_bar1_vmm(device); ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, fifo->chid->nr * @@ -349,8 +349,6 @@ nvkm_fifo_dtor(struct nvkm_engine *engine) nvkm_chid_unref(&fifo->cgid); nvkm_chid_unref(&fifo->chid); - mutex_destroy(&fifo->userd.mutex); - nvkm_event_fini(&fifo->nonstall.event); mutex_destroy(&fifo->mutex); @@ -391,8 +389,5 @@ nvkm_fifo_new_(const struct nvkm_fifo_func *func, struct nvkm_device *device, spin_lock_init(&fifo->lock); mutex_init(&fifo->mutex); - INIT_LIST_HEAD(&fifo->userd.list); - mutex_init(&fifo->userd.mutex); - return nvkm_engine_ctor(&nvkm_fifo, device, type, inst, true, &fifo->engine); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c index 7d4716dcd512..4e09985424b6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c @@ -275,11 +275,7 @@ nvkm_chan_del(struct nvkm_chan **pchan) nvkm_gpuobj_del(&chan->ramfc); if (chan->cgrp) { - if (!chan->func->id_put) - nvkm_chid_put(chan->cgrp->runl->chid, chan->id, &chan->cgrp->lock); - else - chan->func->id_put(chan); - + nvkm_chid_put(chan->cgrp->runl->chid, chan->id, &chan->cgrp->lock); nvkm_cgrp_unref(&chan->cgrp); } @@ -359,14 +355,14 @@ nvkm_chan_new_(const struct nvkm_chan_func *func, struct nvkm_runl *runl, int ru /* Validate arguments against class requirements. */ if ((runq && runq >= runl->func->runqs) || (!func->inst->vmm != !vmm) || - ((func->userd->bar < 0) == !userd) || + (!func->userd->bar == !userd) || (!func->ramfc->ctxdma != !dmaobj) || ((func->ramfc->devm < devm) && devm != BIT(0)) || (!func->ramfc->priv && priv)) { RUNL_DEBUG(runl, "args runq:%d:%d vmm:%d:%p userd:%d:%p " "push:%d:%p devm:%08x:%08x priv:%d:%d", runl->func->runqs, runq, func->inst->vmm, vmm, - func->userd->bar < 0, userd, func->ramfc->ctxdma, dmaobj, + func->userd->bar, userd, func->ramfc->ctxdma, dmaobj, func->ramfc->devm, devm, func->ramfc->priv, priv); return -EINVAL; } @@ -441,30 +437,26 @@ nvkm_chan_new_(const struct nvkm_chan_func *func, struct nvkm_runl *runl, int ru } /* Allocate channel ID. */ - if (!chan->func->id_get) { - chan->id = nvkm_chid_get(runl->chid, chan); - if (chan->id >= 0) { - if (func->userd->bar < 0) { - if (ouserd + chan->func->userd->size >= - nvkm_memory_size(userd)) { - RUNL_DEBUG(runl, "ouserd %llx", ouserd); - return -EINVAL; - } - - ret = nvkm_memory_kmap(userd, &chan->userd.mem); - if (ret) { - RUNL_DEBUG(runl, "userd %d", ret); - return ret; - } - - chan->userd.base = ouserd; - } else { - chan->userd.mem = nvkm_memory_ref(fifo->userd.mem); - chan->userd.base = chan->id * chan->func->userd->size; + chan->id = nvkm_chid_get(runl->chid, chan); + if (chan->id >= 0) { + if (!func->userd->bar) { + if (ouserd + chan->func->userd->size >= + nvkm_memory_size(userd)) { + RUNL_DEBUG(runl, "ouserd %llx", ouserd); + return -EINVAL; + } + + ret = nvkm_memory_kmap(userd, &chan->userd.mem); + if (ret) { + RUNL_DEBUG(runl, "userd %d", ret); + return ret; } + + chan->userd.base = ouserd; + } else { + chan->userd.mem = nvkm_memory_ref(fifo->userd.mem); + chan->userd.base = chan->id * chan->func->userd->size; } - } else { - chan->id = chan->func->id_get(chan, userd, ouserd); } if (chan->id < 0) { diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h index 013682a709d5..445db5dfd1e4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h @@ -17,9 +17,6 @@ struct nvkm_cctx { }; struct nvkm_chan_func { - int (*id_get)(struct nvkm_chan *, struct nvkm_memory *userd, u64 ouserd); - void (*id_put)(struct nvkm_chan *); - const struct nvkm_chan_func_inst { u32 size; bool zero; @@ -27,7 +24,7 @@ struct nvkm_chan_func { } *inst; const struct nvkm_chan_func_userd { - int bar; + enum nvkm_bar_id bar; u32 base; u32 size; void (*clear)(struct nvkm_chan *); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gb202.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gb202.c new file mode 100644 index 000000000000..b469e8afeb0b --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gb202.c @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: MIT + * + * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. + */ +#include "priv.h" +#include "cgrp.h" +#include "chan.h" +#include "runl.h" + +u32 +gb202_chan_doorbell_handle(struct nvkm_chan *chan) +{ + return BIT(30) | (chan->cgrp->runl->id << 16) | chan->id; +} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c index 6c94451d0faa..e4a4fad2eafc 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c @@ -133,7 +133,7 @@ gf100_chan_userd_clear(struct nvkm_chan *chan) static const struct nvkm_chan_func_userd gf100_chan_userd = { - .bar = 1, + .bar = NVKM_BAR1_FB, .size = 0x1000, .clear = gf100_chan_userd_clear, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c index d8a4d773a58c..5655eda52a7b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c @@ -113,7 +113,7 @@ gk104_chan_ramfc = { const struct nvkm_chan_func_userd gk104_chan_userd = { - .bar = 1, + .bar = NVKM_BAR1_FB, .size = 0x200, .clear = gf100_chan_userd_clear, }; @@ -745,7 +745,7 @@ gk104_fifo_init(struct nvkm_fifo *fifo) { struct nvkm_device *device = fifo->engine.subdev.device; - if (fifo->func->chan.func->userd->bar == 1) + if (fifo->func->chan.func->userd->bar == NVKM_BAR1_FB) nvkm_wr32(device, 0x002254, 0x10000000 | fifo->userd.bar1->addr >> 12); nvkm_wr32(device, 0x002100, 0xffffffff); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c index 33066c8cdc64..d7f046c03cfd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c @@ -70,7 +70,6 @@ gv100_chan_ramfc = { const struct nvkm_chan_func_userd gv100_chan_userd = { - .bar = -1, .size = 0x200, .clear = gf100_chan_userd_clear, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c index 674faf002b20..c4b8e567d86f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c @@ -154,7 +154,7 @@ nv04_chan_ramfc = { const struct nvkm_chan_func_userd nv04_chan_userd = { - .bar = 0, + .bar = NVKM_BAR0_PRI, .base = 0x800000, .size = 0x010000, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c index e50a94b6d7f8..084ca5561ee1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c @@ -93,7 +93,7 @@ nv40_chan_ramfc = { static const struct nvkm_chan_func_userd nv40_chan_userd = { - .bar = 0, + .bar = NVKM_BAR0_PRI, .base = 0xc00000, .size = 0x001000, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c index 954b5f3a7d57..7bf77661157d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c @@ -124,7 +124,7 @@ nv50_chan_ramfc = { const struct nvkm_chan_func_userd nv50_chan_userd = { - .bar = 0, + .bar = NVKM_BAR0_PRI, .base = 0xc00000, .size = 0x002000, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h index a0f3277605a5..5e81ae195329 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h @@ -6,6 +6,7 @@ #include <core/enum.h> struct nvkm_cctx; struct nvkm_cgrp; +struct nvkm_chan; struct nvkm_engn; struct nvkm_memory; struct nvkm_runl; @@ -195,6 +196,7 @@ extern const struct nvkm_chan_func_ramfc gv100_chan_ramfc; void tu102_fifo_intr_ctxsw_timeout_info(struct nvkm_engn *, u32 info); extern const struct nvkm_fifo_func_mmu_fault tu102_fifo_mmu_fault; +u32 tu102_chan_doorbell_handle(struct nvkm_chan *); int ga100_fifo_runl_ctor(struct nvkm_fifo *); int ga100_fifo_nonstall_ctor(struct nvkm_fifo *); @@ -206,6 +208,8 @@ extern const struct nvkm_engn_func ga100_engn_ce; extern const struct nvkm_cgrp_func ga100_cgrp; extern const struct nvkm_chan_func ga100_chan; +u32 gb202_chan_doorbell_handle(struct nvkm_chan *); + int nvkm_uchan_new(struct nvkm_fifo *, struct nvkm_cgrp *, const struct nvkm_oclass *, void *argv, u32 argc, struct nvkm_object **); int nvkm_ucgrp_new(struct nvkm_fifo *, const struct nvkm_oclass *, void *argv, u32 argc, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/r535.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/r535.c deleted file mode 100644 index 3454c7d29502..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/r535.c +++ /dev/null @@ -1,665 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" -#include "cgrp.h" -#include "chan.h" -#include "chid.h" -#include "runl.h" - -#include <core/gpuobj.h> -#include <subdev/gsp.h> -#include <subdev/mmu.h> -#include <subdev/vfn.h> -#include <engine/gr.h> - -#include <nvhw/drf.h> - -#include <nvrm/nvtypes.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/alloc/alloc_channel.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/class/cl2080_notification.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fifo.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06fgpfifo.h> -#include <nvrm/535.113.01/nvidia/generated/g_kernel_channel_nvoc.h> -#include <nvrm/535.113.01/nvidia/generated/g_kernel_fifo_nvoc.h> -#include <nvrm/535.113.01/nvidia/inc/kernel/gpu/gpu_engine_type.h> - -static u32 -r535_chan_doorbell_handle(struct nvkm_chan *chan) -{ - return (chan->cgrp->runl->id << 16) | chan->id; -} - -static void -r535_chan_stop(struct nvkm_chan *chan) -{ -} - -static void -r535_chan_start(struct nvkm_chan *chan) -{ -} - -static void -r535_chan_ramfc_clear(struct nvkm_chan *chan) -{ - struct nvkm_fifo *fifo = chan->cgrp->runl->fifo; - - nvkm_gsp_rm_free(&chan->rm.object); - - dma_free_coherent(fifo->engine.subdev.device->dev, fifo->rm.mthdbuf_size, - chan->rm.mthdbuf.ptr, chan->rm.mthdbuf.addr); - - nvkm_cgrp_vctx_put(chan->cgrp, &chan->rm.grctx); -} - -#define CHID_PER_USERD 8 - -static int -r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv) -{ - struct nvkm_fifo *fifo = chan->cgrp->runl->fifo; - struct nvkm_engn *engn; - struct nvkm_device *device = fifo->engine.subdev.device; - NV_CHANNELGPFIFO_ALLOCATION_PARAMETERS *args; - const int userd_p = chan->id / CHID_PER_USERD; - const int userd_i = chan->id % CHID_PER_USERD; - u32 eT = ~0; - int ret; - - if (unlikely(device->gr && !device->gr->engine.subdev.oneinit)) { - ret = nvkm_subdev_oneinit(&device->gr->engine.subdev); - if (ret) - return ret; - } - - nvkm_runl_foreach_engn(engn, chan->cgrp->runl) { - eT = engn->id; - break; - } - - if (WARN_ON(eT == ~0)) - return -EINVAL; - - chan->rm.mthdbuf.ptr = dma_alloc_coherent(fifo->engine.subdev.device->dev, - fifo->rm.mthdbuf_size, - &chan->rm.mthdbuf.addr, GFP_KERNEL); - if (!chan->rm.mthdbuf.ptr) - return -ENOMEM; - - args = nvkm_gsp_rm_alloc_get(&chan->vmm->rm.device.object, 0xf1f00000 | chan->id, - fifo->func->chan.user.oclass, sizeof(*args), - &chan->rm.object); - if (WARN_ON(IS_ERR(args))) - return PTR_ERR(args); - - args->gpFifoOffset = offset; - args->gpFifoEntries = length / 8; - - args->flags = NVDEF(NVOS04, FLAGS, CHANNEL_TYPE, PHYSICAL); - args->flags |= NVDEF(NVOS04, FLAGS, VPR, FALSE); - args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_MAP_REFCOUNTING, FALSE); - args->flags |= NVVAL(NVOS04, FLAGS, GROUP_CHANNEL_RUNQUEUE, chan->runq); - if (!priv) - args->flags |= NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, FALSE); - else - args->flags |= NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, TRUE); - args->flags |= NVDEF(NVOS04, FLAGS, DELAY_CHANNEL_SCHEDULING, FALSE); - args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_DENY_PHYSICAL_MODE_CE, FALSE); - - args->flags |= NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_VALUE, userd_i); - args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_FIXED, FALSE); - args->flags |= NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_VALUE, userd_p); - args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_FIXED, TRUE); - - args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_DENY_AUTH_LEVEL_PRIV, FALSE); - args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_SCRUBBER, FALSE); - args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_CLIENT_MAP_FIFO, FALSE); - args->flags |= NVDEF(NVOS04, FLAGS, SET_EVICT_LAST_CE_PREFETCH_CHANNEL, FALSE); - args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_VGPU_PLUGIN_CONTEXT, FALSE); - args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_PBDMA_ACQUIRE_TIMEOUT, FALSE); - args->flags |= NVDEF(NVOS04, FLAGS, GROUP_CHANNEL_THREAD, DEFAULT); - args->flags |= NVDEF(NVOS04, FLAGS, MAP_CHANNEL, FALSE); - args->flags |= NVDEF(NVOS04, FLAGS, SKIP_CTXBUFFER_ALLOC, FALSE); - - args->hVASpace = chan->vmm->rm.object.handle; - args->engineType = eT; - - args->instanceMem.base = chan->inst->addr; - args->instanceMem.size = chan->inst->size; - args->instanceMem.addressSpace = 2; - args->instanceMem.cacheAttrib = 1; - - args->userdMem.base = nvkm_memory_addr(chan->userd.mem) + chan->userd.base; - args->userdMem.size = fifo->func->chan.func->userd->size; - args->userdMem.addressSpace = 2; - args->userdMem.cacheAttrib = 1; - - args->ramfcMem.base = chan->inst->addr + 0; - args->ramfcMem.size = 0x200; - args->ramfcMem.addressSpace = 2; - args->ramfcMem.cacheAttrib = 1; - - args->mthdbufMem.base = chan->rm.mthdbuf.addr; - args->mthdbufMem.size = fifo->rm.mthdbuf_size; - args->mthdbufMem.addressSpace = 1; - args->mthdbufMem.cacheAttrib = 0; - - if (!priv) - args->internalFlags = NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, PRIVILEGE, USER); - else - args->internalFlags = NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, PRIVILEGE, ADMIN); - args->internalFlags |= NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ERROR_NOTIFIER_TYPE, NONE); - args->internalFlags |= NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ECC_ERROR_NOTIFIER_TYPE, NONE); - - ret = nvkm_gsp_rm_alloc_wr(&chan->rm.object, args); - if (ret) - return ret; - - if (1) { - NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS *ctrl; - - if (1) { - NVA06F_CTRL_BIND_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&chan->rm.object, - NVA06F_CTRL_CMD_BIND, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return PTR_ERR(ctrl); - - ctrl->engineType = eT; - - ret = nvkm_gsp_rm_ctrl_wr(&chan->rm.object, ctrl); - if (ret) - return ret; - } - - ctrl = nvkm_gsp_rm_ctrl_get(&chan->rm.object, - NVA06F_CTRL_CMD_GPFIFO_SCHEDULE, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return PTR_ERR(ctrl); - - ctrl->bEnable = 1; - ret = nvkm_gsp_rm_ctrl_wr(&chan->rm.object, ctrl); - } - - return ret; -} - -static const struct nvkm_chan_func_ramfc -r535_chan_ramfc = { - .write = r535_chan_ramfc_write, - .clear = r535_chan_ramfc_clear, - .devm = 0xfff, - .priv = true, -}; - -struct r535_chan_userd { - struct nvkm_memory *mem; - struct nvkm_memory *map; - int chid; - u32 used; - - struct list_head head; -} *userd; - -static void -r535_chan_id_put(struct nvkm_chan *chan) -{ - struct nvkm_runl *runl = chan->cgrp->runl; - struct nvkm_fifo *fifo = runl->fifo; - struct r535_chan_userd *userd; - - mutex_lock(&fifo->userd.mutex); - list_for_each_entry(userd, &fifo->userd.list, head) { - if (userd->map == chan->userd.mem) { - u32 chid = chan->userd.base / chan->func->userd->size; - - userd->used &= ~BIT(chid); - if (!userd->used) { - nvkm_memory_unref(&userd->map); - nvkm_memory_unref(&userd->mem); - nvkm_chid_put(runl->chid, userd->chid, &chan->cgrp->lock); - list_del(&userd->head); - kfree(userd); - } - - break; - } - } - mutex_unlock(&fifo->userd.mutex); - -} - -static int -r535_chan_id_get_locked(struct nvkm_chan *chan, struct nvkm_memory *muserd, u64 ouserd) -{ - const u32 userd_size = CHID_PER_USERD * chan->func->userd->size; - struct nvkm_runl *runl = chan->cgrp->runl; - struct nvkm_fifo *fifo = runl->fifo; - struct r535_chan_userd *userd; - u32 chid; - int ret; - - if (ouserd + chan->func->userd->size >= userd_size || - (ouserd & (chan->func->userd->size - 1))) { - RUNL_DEBUG(runl, "ouserd %llx", ouserd); - return -EINVAL; - } - - chid = div_u64(ouserd, chan->func->userd->size); - - list_for_each_entry(userd, &fifo->userd.list, head) { - if (userd->mem == muserd) { - if (userd->used & BIT(chid)) - return -EBUSY; - break; - } - } - - if (&userd->head == &fifo->userd.list) { - if (nvkm_memory_size(muserd) < userd_size) { - RUNL_DEBUG(runl, "userd too small"); - return -EINVAL; - } - - userd = kzalloc(sizeof(*userd), GFP_KERNEL); - if (!userd) - return -ENOMEM; - - userd->chid = nvkm_chid_get(runl->chid, chan); - if (userd->chid < 0) { - ret = userd->chid; - kfree(userd); - return ret; - } - - userd->mem = nvkm_memory_ref(muserd); - - ret = nvkm_memory_kmap(userd->mem, &userd->map); - if (ret) { - nvkm_chid_put(runl->chid, userd->chid, &chan->cgrp->lock); - kfree(userd); - return ret; - } - - - list_add(&userd->head, &fifo->userd.list); - } - - userd->used |= BIT(chid); - - chan->userd.mem = nvkm_memory_ref(userd->map); - chan->userd.base = ouserd; - - return (userd->chid * CHID_PER_USERD) + chid; -} - -static int -r535_chan_id_get(struct nvkm_chan *chan, struct nvkm_memory *muserd, u64 ouserd) -{ - struct nvkm_fifo *fifo = chan->cgrp->runl->fifo; - int ret; - - mutex_lock(&fifo->userd.mutex); - ret = r535_chan_id_get_locked(chan, muserd, ouserd); - mutex_unlock(&fifo->userd.mutex); - return ret; -} - -static const struct nvkm_chan_func -r535_chan = { - .id_get = r535_chan_id_get, - .id_put = r535_chan_id_put, - .inst = &gf100_chan_inst, - .userd = &gv100_chan_userd, - .ramfc = &r535_chan_ramfc, - .start = r535_chan_start, - .stop = r535_chan_stop, - .doorbell_handle = r535_chan_doorbell_handle, -}; - -static const struct nvkm_cgrp_func -r535_cgrp = { -}; - -static int -r535_engn_nonstall(struct nvkm_engn *engn) -{ - struct nvkm_subdev *subdev = &engn->engine->subdev; - int ret; - - ret = nvkm_gsp_intr_nonstall(subdev->device->gsp, subdev->type, subdev->inst); - WARN_ON(ret == -ENOENT); - return ret; -} - -static const struct nvkm_engn_func -r535_ce = { - .nonstall = r535_engn_nonstall, -}; - -static int -r535_gr_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan) -{ - /* RM requires GR context buffers to remain mapped until after the - * channel has been destroyed (as opposed to after the last gr obj - * has been deleted). - * - * Take an extra ref here, which will be released once the channel - * object has been deleted. - */ - refcount_inc(&vctx->refs); - chan->rm.grctx = vctx; - return 0; -} - -static const struct nvkm_engn_func -r535_gr = { - .nonstall = r535_engn_nonstall, - .ctor2 = r535_gr_ctor, -}; - -static int -r535_flcn_bind(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan) -{ - struct nvkm_gsp_client *client = &chan->vmm->rm.client; - NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&chan->vmm->rm.device.subdevice, - NV2080_CTRL_CMD_GPU_PROMOTE_CTX, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - ctrl->hClient = client->object.handle; - ctrl->hObject = chan->rm.object.handle; - ctrl->hChanClient = client->object.handle; - ctrl->virtAddress = vctx->vma->addr; - ctrl->size = vctx->inst->size; - ctrl->engineType = engn->id; - ctrl->ChID = chan->id; - - return nvkm_gsp_rm_ctrl_wr(&chan->vmm->rm.device.subdevice, ctrl); -} - -static int -r535_flcn_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan) -{ - int ret; - - if (WARN_ON(!engn->rm.size)) - return -EINVAL; - - ret = nvkm_gpuobj_new(engn->engine->subdev.device, engn->rm.size, 0, true, NULL, - &vctx->inst); - if (ret) - return ret; - - ret = nvkm_vmm_get(vctx->vmm, 12, vctx->inst->size, &vctx->vma); - if (ret) - return ret; - - ret = nvkm_memory_map(vctx->inst, 0, vctx->vmm, vctx->vma, NULL, 0); - if (ret) - return ret; - - return r535_flcn_bind(engn, vctx, chan); -} - -static const struct nvkm_engn_func -r535_flcn = { - .nonstall = r535_engn_nonstall, - .ctor2 = r535_flcn_ctor, -}; - -static void -r535_runl_allow(struct nvkm_runl *runl, u32 engm) -{ -} - -static void -r535_runl_block(struct nvkm_runl *runl, u32 engm) -{ -} - -static const struct nvkm_runl_func -r535_runl = { - .block = r535_runl_block, - .allow = r535_runl_allow, -}; - -static int -r535_fifo_2080_type(enum nvkm_subdev_type type, int inst) -{ - switch (type) { - case NVKM_ENGINE_GR: return NV2080_ENGINE_TYPE_GR0; - case NVKM_ENGINE_CE: return NV2080_ENGINE_TYPE_COPY0 + inst; - case NVKM_ENGINE_SEC2: return NV2080_ENGINE_TYPE_SEC2; - case NVKM_ENGINE_NVDEC: return NV2080_ENGINE_TYPE_NVDEC0 + inst; - case NVKM_ENGINE_NVENC: return NV2080_ENGINE_TYPE_NVENC0 + inst; - case NVKM_ENGINE_NVJPG: return NV2080_ENGINE_TYPE_NVJPEG0 + inst; - case NVKM_ENGINE_OFA: return NV2080_ENGINE_TYPE_OFA; - case NVKM_ENGINE_SW: return NV2080_ENGINE_TYPE_SW; - default: - break; - } - - WARN_ON(1); - return -EINVAL; -} - -static int -r535_fifo_engn_type(RM_ENGINE_TYPE rm, enum nvkm_subdev_type *ptype) -{ - switch (rm) { - case RM_ENGINE_TYPE_GR0: - *ptype = NVKM_ENGINE_GR; - return 0; - case RM_ENGINE_TYPE_COPY0...RM_ENGINE_TYPE_COPY9: - *ptype = NVKM_ENGINE_CE; - return rm - RM_ENGINE_TYPE_COPY0; - case RM_ENGINE_TYPE_NVDEC0...RM_ENGINE_TYPE_NVDEC7: - *ptype = NVKM_ENGINE_NVDEC; - return rm - RM_ENGINE_TYPE_NVDEC0; - case RM_ENGINE_TYPE_NVENC0...RM_ENGINE_TYPE_NVENC2: - *ptype = NVKM_ENGINE_NVENC; - return rm - RM_ENGINE_TYPE_NVENC0; - case RM_ENGINE_TYPE_SW: - *ptype = NVKM_ENGINE_SW; - return 0; - case RM_ENGINE_TYPE_SEC2: - *ptype = NVKM_ENGINE_SEC2; - return 0; - case RM_ENGINE_TYPE_NVJPEG0...RM_ENGINE_TYPE_NVJPEG7: - *ptype = NVKM_ENGINE_NVJPG; - return rm - RM_ENGINE_TYPE_NVJPEG0; - case RM_ENGINE_TYPE_OFA: - *ptype = NVKM_ENGINE_OFA; - return 0; - default: - return -EINVAL; - } -} - -static int -r535_fifo_ectx_size(struct nvkm_fifo *fifo) -{ - NV2080_CTRL_INTERNAL_GET_CONSTRUCTED_FALCON_INFO_PARAMS *ctrl; - struct nvkm_gsp *gsp = fifo->engine.subdev.device->gsp; - struct nvkm_runl *runl; - struct nvkm_engn *engn; - - ctrl = nvkm_gsp_rm_ctrl_rd(&gsp->internal.device.subdevice, - NV2080_CTRL_CMD_INTERNAL_GET_CONSTRUCTED_FALCON_INFO, - sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return PTR_ERR(ctrl); - - for (int i = 0; i < ctrl->numConstructedFalcons; i++) { - nvkm_runl_foreach(runl, fifo) { - nvkm_runl_foreach_engn(engn, runl) { - if (engn->rm.desc == ctrl->constructedFalconsTable[i].engDesc) { - engn->rm.size = - ctrl->constructedFalconsTable[i].ctxBufferSize; - break; - } - } - } - } - - nvkm_gsp_rm_ctrl_done(&gsp->internal.device.subdevice, ctrl); - return 0; -} - -static int -r535_fifo_runl_ctor(struct nvkm_fifo *fifo) -{ - struct nvkm_subdev *subdev = &fifo->engine.subdev; - struct nvkm_gsp *gsp = subdev->device->gsp; - struct nvkm_runl *runl; - struct nvkm_engn *engn; - u32 cgids = 2048; - u32 chids = 2048; - int ret; - NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *ctrl; - - if ((ret = nvkm_chid_new(&nvkm_chan_event, subdev, cgids, 0, cgids, &fifo->cgid)) || - (ret = nvkm_chid_new(&nvkm_chan_event, subdev, chids, 0, chids, &fifo->chid))) - return ret; - - ctrl = nvkm_gsp_rm_ctrl_rd(&gsp->internal.device.subdevice, - NV2080_CTRL_CMD_FIFO_GET_DEVICE_INFO_TABLE, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return PTR_ERR(ctrl); - - for (int i = 0; i < ctrl->numEntries; i++) { - const u32 addr = ctrl->entries[i].engineData[ENGINE_INFO_TYPE_RUNLIST_PRI_BASE]; - const u32 id = ctrl->entries[i].engineData[ENGINE_INFO_TYPE_RUNLIST]; - - runl = nvkm_runl_get(fifo, id, addr); - if (!runl) { - runl = nvkm_runl_new(fifo, id, addr, 0); - if (WARN_ON(IS_ERR(runl))) - continue; - } - } - - for (int i = 0; i < ctrl->numEntries; i++) { - const u32 addr = ctrl->entries[i].engineData[ENGINE_INFO_TYPE_RUNLIST_PRI_BASE]; - const u32 rmid = ctrl->entries[i].engineData[ENGINE_INFO_TYPE_RM_ENGINE_TYPE]; - const u32 id = ctrl->entries[i].engineData[ENGINE_INFO_TYPE_RUNLIST]; - enum nvkm_subdev_type type; - int inst, nv2080; - - runl = nvkm_runl_get(fifo, id, addr); - if (!runl) - continue; - - inst = r535_fifo_engn_type(rmid, &type); - if (inst < 0) { - nvkm_warn(subdev, "RM_ENGINE_TYPE 0x%x\n", rmid); - nvkm_runl_del(runl); - continue; - } - - nv2080 = r535_fifo_2080_type(type, inst); - if (nv2080 < 0) { - nvkm_runl_del(runl); - continue; - } - - switch (type) { - case NVKM_ENGINE_CE: - engn = nvkm_runl_add(runl, nv2080, &r535_ce, type, inst); - break; - case NVKM_ENGINE_GR: - engn = nvkm_runl_add(runl, nv2080, &r535_gr, type, inst); - break; - case NVKM_ENGINE_NVDEC: - case NVKM_ENGINE_NVENC: - case NVKM_ENGINE_NVJPG: - case NVKM_ENGINE_OFA: - engn = nvkm_runl_add(runl, nv2080, &r535_flcn, type, inst); - break; - case NVKM_ENGINE_SW: - continue; - default: - engn = NULL; - break; - } - - if (!engn) { - nvkm_runl_del(runl); - continue; - } - - engn->rm.desc = ctrl->entries[i].engineData[ENGINE_INFO_TYPE_ENG_DESC]; - } - - nvkm_gsp_rm_ctrl_done(&gsp->internal.device.subdevice, ctrl); - - { - NV2080_CTRL_CE_GET_FAULT_METHOD_BUFFER_SIZE_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_rd(&gsp->internal.device.subdevice, - NV2080_CTRL_CMD_CE_GET_FAULT_METHOD_BUFFER_SIZE, - sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - fifo->rm.mthdbuf_size = ctrl->size; - - nvkm_gsp_rm_ctrl_done(&gsp->internal.device.subdevice, ctrl); - } - - return r535_fifo_ectx_size(fifo); -} - -static void -r535_fifo_dtor(struct nvkm_fifo *fifo) -{ - kfree(fifo->func); -} - -int -r535_fifo_new(const struct nvkm_fifo_func *hw, struct nvkm_device *device, - enum nvkm_subdev_type type, int inst, struct nvkm_fifo **pfifo) -{ - struct nvkm_fifo_func *rm; - - if (!(rm = kzalloc(sizeof(*rm), GFP_KERNEL))) - return -ENOMEM; - - rm->dtor = r535_fifo_dtor; - rm->runl_ctor = r535_fifo_runl_ctor; - rm->runl = &r535_runl; - rm->cgrp = hw->cgrp; - rm->cgrp.func = &r535_cgrp; - rm->chan = hw->chan; - rm->chan.func = &r535_chan; - rm->nonstall = &ga100_fifo_nonstall; - rm->nonstall_ctor = ga100_fifo_nonstall_ctor; - - return nvkm_fifo_new_(rm, device, type, inst, pfifo); -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c index 1d39a6840a40..c5a03298e88c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c @@ -31,7 +31,7 @@ #include <nvif/class.h> -static u32 +u32 tu102_chan_doorbell_handle(struct nvkm_chan *chan) { return (chan->cgrp->runl->id << 16) | chan->id; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c index 9e56bcc166ed..52420a1edca5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c @@ -258,7 +258,7 @@ nvkm_uchan_map(struct nvkm_object *object, void *argv, u32 argc, struct nvkm_chan *chan = nvkm_uchan(object)->chan; struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; - if (chan->func->userd->bar < 0) + if (!chan->func->userd->bar) return -ENOSYS; *type = NVKM_OBJECT_MAP_IO; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild index 1555f8c40b4f..b5418f05ccd8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild @@ -41,9 +41,6 @@ nvkm-y += nvkm/engine/gr/gp10b.o nvkm-y += nvkm/engine/gr/gv100.o nvkm-y += nvkm/engine/gr/tu102.o nvkm-y += nvkm/engine/gr/ga102.o -nvkm-y += nvkm/engine/gr/ad102.o - -nvkm-y += nvkm/engine/gr/r535.o nvkm-y += nvkm/engine/gr/ctxnv40.o nvkm-y += nvkm/engine/gr/ctxnv50.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ad102.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ad102.c deleted file mode 100644 index 7bfa6240d283..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ad102.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "gf100.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct gf100_gr_func -ad102_gr = { - .sclass = { - { -1, -1, FERMI_TWOD_A }, - { -1, -1, KEPLER_INLINE_TO_MEMORY_B }, - { -1, -1, ADA_A }, - { -1, -1, ADA_COMPUTE_A }, - {} - } -}; - -int -ad102_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_gr_new(&ad102_gr, device, type, inst, pgr); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c index d285c597aff9..2b51f1d0c281 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c @@ -352,7 +352,7 @@ int ga102_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr) { if (nvkm_gsp_rm(device->gsp)) - return r535_gr_new(&ga102_gr, device, type, inst, pgr); + return -ENODEV; return gf100_gr_new_(ga102_gr_fwif, device, type, inst, pgr); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h index b0e0c9305034..54f686ba39ac 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h @@ -445,6 +445,4 @@ void gp108_gr_acr_bld_patch(struct nvkm_acr *, u32, s64); int gf100_gr_new_(const struct gf100_gr_fwif *, struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_gr **); -int r535_gr_new(const struct gf100_gr_func *, struct nvkm_device *, enum nvkm_subdev_type, int, - struct nvkm_gr **); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c index 02a8c62a0a32..13407fafe947 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c @@ -297,7 +297,7 @@ nv20_gr_init(struct nvkm_gr *base) nvkm_wr32(device, NV10_PGRAPH_SURFACE, tmp); /* begin RAM config */ - vramsz = device->func->resource_size(device, 1) - 1; + vramsz = device->func->resource_size(device, NVKM_BAR1_FB) - 1; nvkm_wr32(device, 0x4009A4, nvkm_rd32(device, 0x100200)); nvkm_wr32(device, 0x4009A8, nvkm_rd32(device, 0x100204)); nvkm_wr32(device, NV10_PGRAPH_RDI_INDEX, 0x00EA0000); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c index a5e1f02791b4..b609b0150ba1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c @@ -386,7 +386,7 @@ nv40_gr_init(struct nvkm_gr *base) } /* begin RAM config */ - vramsz = device->func->resource_size(device, 1) - 1; + vramsz = device->func->resource_size(device, NVKM_BAR1_FB) - 1; switch (device->chipset) { case 0x40: nvkm_wr32(device, 0x4009A4, nvkm_rd32(device, 0x100200)); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/r535.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/r535.c deleted file mode 100644 index f4bed3eb1ec2..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/r535.c +++ /dev/null @@ -1,508 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "gf100.h" - -#include <core/memory.h> -#include <subdev/gsp.h> -#include <subdev/mmu/vmm.h> -#include <engine/fifo/priv.h> - -#include <nvif/if900d.h> - -#include <nvhw/drf.h> - -#include <nvrm/nvtypes.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/alloc/alloc_channel.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fifo.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h> -#include <nvrm/535.113.01/nvidia/generated/g_kernel_channel_nvoc.h> - -#define r535_gr(p) container_of((p), struct r535_gr, base) - -#define R515_GR_MAX_CTXBUFS 9 - -struct r535_gr { - struct nvkm_gr base; - - struct { - u16 bufferId; - u32 size; - u8 page; - u8 align; - bool global; - bool init; - bool ro; - } ctxbuf[R515_GR_MAX_CTXBUFS]; - int ctxbuf_nr; - - struct nvkm_memory *ctxbuf_mem[R515_GR_MAX_CTXBUFS]; -}; - -struct r535_gr_chan { - struct nvkm_object object; - struct r535_gr *gr; - - struct nvkm_vmm *vmm; - struct nvkm_chan *chan; - - struct nvkm_memory *mem[R515_GR_MAX_CTXBUFS]; - struct nvkm_vma *vma[R515_GR_MAX_CTXBUFS]; -}; - -struct r535_gr_obj { - struct nvkm_object object; - struct nvkm_gsp_object rm; -}; - -static void * -r535_gr_obj_dtor(struct nvkm_object *object) -{ - struct r535_gr_obj *obj = container_of(object, typeof(*obj), object); - - nvkm_gsp_rm_free(&obj->rm); - return obj; -} - -static const struct nvkm_object_func -r535_gr_obj = { - .dtor = r535_gr_obj_dtor, -}; - -static int -r535_gr_obj_ctor(const struct nvkm_oclass *oclass, void *argv, u32 argc, - struct nvkm_object **pobject) -{ - struct r535_gr_chan *chan = container_of(oclass->parent, typeof(*chan), object); - struct r535_gr_obj *obj; - - if (!(obj = kzalloc(sizeof(*obj), GFP_KERNEL))) - return -ENOMEM; - - nvkm_object_ctor(&r535_gr_obj, oclass, &obj->object); - *pobject = &obj->object; - - return nvkm_gsp_rm_alloc(&chan->chan->rm.object, oclass->handle, oclass->base.oclass, 0, - &obj->rm); -} - -static void * -r535_gr_chan_dtor(struct nvkm_object *object) -{ - struct r535_gr_chan *grc = container_of(object, typeof(*grc), object); - struct r535_gr *gr = grc->gr; - - for (int i = 0; i < gr->ctxbuf_nr; i++) { - nvkm_vmm_put(grc->vmm, &grc->vma[i]); - nvkm_memory_unref(&grc->mem[i]); - } - - nvkm_vmm_unref(&grc->vmm); - return grc; -} - -static const struct nvkm_object_func -r535_gr_chan = { - .dtor = r535_gr_chan_dtor, -}; - -static int -r535_gr_promote_ctx(struct r535_gr *gr, bool golden, struct nvkm_vmm *vmm, - struct nvkm_memory **pmem, struct nvkm_vma **pvma, - struct nvkm_gsp_object *chan) -{ - struct nvkm_subdev *subdev = &gr->base.engine.subdev; - struct nvkm_device *device = subdev->device; - NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS *ctrl; - - ctrl = nvkm_gsp_rm_ctrl_get(&vmm->rm.device.subdevice, - NV2080_CTRL_CMD_GPU_PROMOTE_CTX, sizeof(*ctrl)); - if (WARN_ON(IS_ERR(ctrl))) - return PTR_ERR(ctrl); - - ctrl->engineType = 1; - ctrl->hChanClient = vmm->rm.client.object.handle; - ctrl->hObject = chan->handle; - - for (int i = 0; i < gr->ctxbuf_nr; i++) { - NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ENTRY *entry = - &ctrl->promoteEntry[ctrl->entryCount]; - const bool alloc = golden || !gr->ctxbuf[i].global; - int ret; - - entry->bufferId = gr->ctxbuf[i].bufferId; - entry->bInitialize = gr->ctxbuf[i].init && alloc; - - if (alloc) { - ret = nvkm_memory_new(device, gr->ctxbuf[i].init ? - NVKM_MEM_TARGET_INST : NVKM_MEM_TARGET_INST_SR_LOST, - gr->ctxbuf[i].size, 1 << gr->ctxbuf[i].page, - gr->ctxbuf[i].init, &pmem[i]); - if (WARN_ON(ret)) - return ret; - - if (gr->ctxbuf[i].bufferId == - NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ID_PRIV_ACCESS_MAP) - entry->bNonmapped = 1; - } else { - if (gr->ctxbuf[i].bufferId == - NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ID_UNRESTRICTED_PRIV_ACCESS_MAP) - continue; - - pmem[i] = nvkm_memory_ref(gr->ctxbuf_mem[i]); - } - - if (!entry->bNonmapped) { - struct gf100_vmm_map_v0 args = { - .priv = 1, - .ro = gr->ctxbuf[i].ro, - }; - - mutex_lock(&vmm->mutex.vmm); - ret = nvkm_vmm_get_locked(vmm, false, true, false, 0, gr->ctxbuf[i].align, - nvkm_memory_size(pmem[i]), &pvma[i]); - mutex_unlock(&vmm->mutex.vmm); - if (ret) - return ret; - - ret = nvkm_memory_map(pmem[i], 0, vmm, pvma[i], &args, sizeof(args)); - if (ret) - return ret; - - entry->gpuVirtAddr = pvma[i]->addr; - } - - if (entry->bInitialize) { - entry->gpuPhysAddr = nvkm_memory_addr(pmem[i]); - entry->size = gr->ctxbuf[i].size; - entry->physAttr = 4; - } - - nvkm_debug(subdev, - "promote %02d: pa %016llx/%08x sz %016llx va %016llx init:%d nm:%d\n", - entry->bufferId, entry->gpuPhysAddr, entry->physAttr, entry->size, - entry->gpuVirtAddr, entry->bInitialize, entry->bNonmapped); - - ctrl->entryCount++; - } - - return nvkm_gsp_rm_ctrl_wr(&vmm->rm.device.subdevice, ctrl); -} - -static int -r535_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *chan, const struct nvkm_oclass *oclass, - struct nvkm_object **pobject) -{ - struct r535_gr *gr = r535_gr(base); - struct r535_gr_chan *grc; - int ret; - - if (!(grc = kzalloc(sizeof(*grc), GFP_KERNEL))) - return -ENOMEM; - - nvkm_object_ctor(&r535_gr_chan, oclass, &grc->object); - grc->gr = gr; - grc->vmm = nvkm_vmm_ref(chan->vmm); - grc->chan = chan; - *pobject = &grc->object; - - ret = r535_gr_promote_ctx(gr, false, grc->vmm, grc->mem, grc->vma, &chan->rm.object); - if (ret) - return ret; - - return 0; -} - -static u64 -r535_gr_units(struct nvkm_gr *gr) -{ - struct nvkm_gsp *gsp = gr->engine.subdev.device->gsp; - - return (gsp->gr.tpcs << 8) | gsp->gr.gpcs; -} - -static int -r535_gr_oneinit(struct nvkm_gr *base) -{ - NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS *info; - struct r535_gr *gr = container_of(base, typeof(*gr), base); - struct nvkm_subdev *subdev = &gr->base.engine.subdev; - struct nvkm_device *device = subdev->device; - struct nvkm_gsp *gsp = device->gsp; - struct nvkm_mmu *mmu = device->mmu; - struct { - struct nvkm_memory *inst; - struct nvkm_vmm *vmm; - struct nvkm_gsp_object chan; - struct nvkm_vma *vma[R515_GR_MAX_CTXBUFS]; - } golden = {}; - int ret; - - /* Allocate a channel to use for golden context init. */ - ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x12000, 0, true, &golden.inst); - if (ret) - goto done; - - ret = nvkm_vmm_new(device, 0x1000, 0, NULL, 0, NULL, "grGoldenVmm", &golden.vmm); - if (ret) - goto done; - - ret = mmu->func->promote_vmm(golden.vmm); - if (ret) - goto done; - - { - NV_CHANNELGPFIFO_ALLOCATION_PARAMETERS *args; - - args = nvkm_gsp_rm_alloc_get(&golden.vmm->rm.device.object, 0xf1f00000, - device->fifo->func->chan.user.oclass, - sizeof(*args), &golden.chan); - if (IS_ERR(args)) { - ret = PTR_ERR(args); - goto done; - } - - args->gpFifoOffset = 0; - args->gpFifoEntries = 0x1000 / 8; - args->flags = - NVDEF(NVOS04, FLAGS, CHANNEL_TYPE, PHYSICAL) | - NVDEF(NVOS04, FLAGS, VPR, FALSE) | - NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_MAP_REFCOUNTING, FALSE) | - NVVAL(NVOS04, FLAGS, GROUP_CHANNEL_RUNQUEUE, 0) | - NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, TRUE) | - NVDEF(NVOS04, FLAGS, DELAY_CHANNEL_SCHEDULING, FALSE) | - NVDEF(NVOS04, FLAGS, CHANNEL_DENY_PHYSICAL_MODE_CE, FALSE) | - NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_VALUE, 0) | - NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_FIXED, FALSE) | - NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_VALUE, 0) | - NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_FIXED, TRUE) | - NVDEF(NVOS04, FLAGS, CHANNEL_DENY_AUTH_LEVEL_PRIV, FALSE) | - NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_SCRUBBER, FALSE) | - NVDEF(NVOS04, FLAGS, CHANNEL_CLIENT_MAP_FIFO, FALSE) | - NVDEF(NVOS04, FLAGS, SET_EVICT_LAST_CE_PREFETCH_CHANNEL, FALSE) | - NVDEF(NVOS04, FLAGS, CHANNEL_VGPU_PLUGIN_CONTEXT, FALSE) | - NVDEF(NVOS04, FLAGS, CHANNEL_PBDMA_ACQUIRE_TIMEOUT, FALSE) | - NVDEF(NVOS04, FLAGS, GROUP_CHANNEL_THREAD, DEFAULT) | - NVDEF(NVOS04, FLAGS, MAP_CHANNEL, FALSE) | - NVDEF(NVOS04, FLAGS, SKIP_CTXBUFFER_ALLOC, FALSE); - args->hVASpace = golden.vmm->rm.object.handle; - args->engineType = 1; - args->instanceMem.base = nvkm_memory_addr(golden.inst); - args->instanceMem.size = 0x1000; - args->instanceMem.addressSpace = 2; - args->instanceMem.cacheAttrib = 1; - args->ramfcMem.base = nvkm_memory_addr(golden.inst); - args->ramfcMem.size = 0x200; - args->ramfcMem.addressSpace = 2; - args->ramfcMem.cacheAttrib = 1; - args->userdMem.base = nvkm_memory_addr(golden.inst) + 0x1000; - args->userdMem.size = 0x200; - args->userdMem.addressSpace = 2; - args->userdMem.cacheAttrib = 1; - args->mthdbufMem.base = nvkm_memory_addr(golden.inst) + 0x2000; - args->mthdbufMem.size = 0x5000; - args->mthdbufMem.addressSpace = 2; - args->mthdbufMem.cacheAttrib = 1; - args->internalFlags = - NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, PRIVILEGE, ADMIN) | - NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ERROR_NOTIFIER_TYPE, NONE) | - NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ECC_ERROR_NOTIFIER_TYPE, NONE); - - ret = nvkm_gsp_rm_alloc_wr(&golden.chan, args); - if (ret) - goto done; - } - - /* Fetch context buffer info from RM and allocate each of them here to use - * during golden context init (or later as a global context buffer). - * - * Also build the information that'll be used to create channel contexts. - */ - info = nvkm_gsp_rm_ctrl_rd(&gsp->internal.device.subdevice, - NV2080_CTRL_CMD_INTERNAL_STATIC_KGR_GET_CONTEXT_BUFFERS_INFO, - sizeof(*info)); - if (WARN_ON(IS_ERR(info))) { - ret = PTR_ERR(info); - goto done; - } - - for (int i = 0; i < ARRAY_SIZE(info->engineContextBuffersInfo[0].engine); i++) { - static const struct { - u32 id0; /* NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID */ - u32 id1; /* NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ID */ - bool global; - bool init; - bool ro; - } map[] = { -#define _A(n,N,G,I,R) { .id0 = NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_##n, \ - .id1 = NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ID_##N, \ - .global = (G), .init = (I), .ro = (R) } -#define _B(N,G,I,R) _A(GRAPHICS_##N, N, (G), (I), (R)) - /* global init ro */ - _A( GRAPHICS, MAIN, false, true, false), - _B( PATCH, false, true, false), - _A( GRAPHICS_BUNDLE_CB, BUFFER_BUNDLE_CB, true, false, false), - _B( PAGEPOOL, true, false, false), - _B( ATTRIBUTE_CB, true, false, false), - _B( RTV_CB_GLOBAL, true, false, false), - _B( FECS_EVENT, true, true, false), - _B( PRIV_ACCESS_MAP, true, true, true), -#undef _B -#undef _A - }; - u32 size = info->engineContextBuffersInfo[0].engine[i].size; - u8 align, page; - int id; - - for (id = 0; id < ARRAY_SIZE(map); id++) { - if (map[id].id0 == i) - break; - } - - nvkm_debug(subdev, "%02x: size:0x%08x %s\n", i, - size, (id < ARRAY_SIZE(map)) ? "*" : ""); - if (id >= ARRAY_SIZE(map)) - continue; - - if (map[id].id1 == NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ID_MAIN) - size = ALIGN(size, 0x1000) + 64 * 0x1000; /* per-subctx headers */ - - if (size >= 1 << 21) page = 21; - else if (size >= 1 << 16) page = 16; - else page = 12; - - if (map[id].id1 == NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ID_ATTRIBUTE_CB) - align = order_base_2(size); - else - align = page; - - if (WARN_ON(gr->ctxbuf_nr == ARRAY_SIZE(gr->ctxbuf))) - continue; - - gr->ctxbuf[gr->ctxbuf_nr].bufferId = map[id].id1; - gr->ctxbuf[gr->ctxbuf_nr].size = size; - gr->ctxbuf[gr->ctxbuf_nr].page = page; - gr->ctxbuf[gr->ctxbuf_nr].align = align; - gr->ctxbuf[gr->ctxbuf_nr].global = map[id].global; - gr->ctxbuf[gr->ctxbuf_nr].init = map[id].init; - gr->ctxbuf[gr->ctxbuf_nr].ro = map[id].ro; - gr->ctxbuf_nr++; - - if (map[id].id1 == NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ID_PRIV_ACCESS_MAP) { - if (WARN_ON(gr->ctxbuf_nr == ARRAY_SIZE(gr->ctxbuf))) - continue; - - gr->ctxbuf[gr->ctxbuf_nr] = gr->ctxbuf[gr->ctxbuf_nr - 1]; - gr->ctxbuf[gr->ctxbuf_nr].bufferId = - NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ID_UNRESTRICTED_PRIV_ACCESS_MAP; - gr->ctxbuf_nr++; - } - } - - nvkm_gsp_rm_ctrl_done(&gsp->internal.device.subdevice, info); - - /* Promote golden context to RM. */ - ret = r535_gr_promote_ctx(gr, true, golden.vmm, gr->ctxbuf_mem, golden.vma, &golden.chan); - if (ret) - goto done; - - /* Allocate 3D class on channel to trigger golden context init in RM. */ - { - int i; - - for (i = 0; gr->base.func->sclass[i].ctor; i++) { - if ((gr->base.func->sclass[i].oclass & 0xff) == 0x97) { - struct nvkm_gsp_object threed; - - ret = nvkm_gsp_rm_alloc(&golden.chan, 0x97000000, - gr->base.func->sclass[i].oclass, 0, - &threed); - if (ret) - goto done; - - nvkm_gsp_rm_free(&threed); - break; - } - } - - if (WARN_ON(!gr->base.func->sclass[i].ctor)) { - ret = -EINVAL; - goto done; - } - } - -done: - nvkm_gsp_rm_free(&golden.chan); - for (int i = gr->ctxbuf_nr - 1; i >= 0; i--) - nvkm_vmm_put(golden.vmm, &golden.vma[i]); - nvkm_vmm_unref(&golden.vmm); - nvkm_memory_unref(&golden.inst); - return ret; - -} - -static void * -r535_gr_dtor(struct nvkm_gr *base) -{ - struct r535_gr *gr = r535_gr(base); - - while (gr->ctxbuf_nr) - nvkm_memory_unref(&gr->ctxbuf_mem[--gr->ctxbuf_nr]); - - kfree(gr->base.func); - return gr; -} - -int -r535_gr_new(const struct gf100_gr_func *hw, - struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr) -{ - struct nvkm_gr_func *rm; - struct r535_gr *gr; - int nclass; - - for (nclass = 0; hw->sclass[nclass].oclass; nclass++); - - if (!(rm = kzalloc(sizeof(*rm) + (nclass + 1) * sizeof(rm->sclass[0]), GFP_KERNEL))) - return -ENOMEM; - - rm->dtor = r535_gr_dtor; - rm->oneinit = r535_gr_oneinit; - rm->units = r535_gr_units; - rm->chan_new = r535_gr_chan_new; - - for (int i = 0; i < nclass; i++) { - rm->sclass[i].minver = hw->sclass[i].minver; - rm->sclass[i].maxver = hw->sclass[i].maxver; - rm->sclass[i].oclass = hw->sclass[i].oclass; - rm->sclass[i].ctor = r535_gr_obj_ctor; - } - - if (!(gr = kzalloc(sizeof(*gr), GFP_KERNEL))) { - kfree(rm); - return -ENOMEM; - } - - *pgr = &gr->base; - - return nvkm_gr_ctor(rm, device, type, inst, true, &gr->base); -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c index b7a458e9040a..bda8054c6b59 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c @@ -219,7 +219,7 @@ int tu102_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr) { if (nvkm_gsp_rm(device->gsp)) - return r535_gr_new(&tu102_gr, device, type, inst, pgr); + return -ENODEV; return gf100_gr_new_(tu102_gr_fwif, device, type, inst, pgr); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/Kbuild index 2b0e923cb755..37b0cdc760c7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/Kbuild @@ -2,8 +2,4 @@ nvkm-y += nvkm/engine/nvdec/base.o nvkm-y += nvkm/engine/nvdec/gm107.o nvkm-y += nvkm/engine/nvdec/tu102.o -nvkm-y += nvkm/engine/nvdec/ga100.o nvkm-y += nvkm/engine/nvdec/ga102.o -nvkm-y += nvkm/engine/nvdec/ad102.o - -nvkm-y += nvkm/engine/nvdec/r535.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ad102.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ad102.c deleted file mode 100644 index d72b3aae9a2b..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ad102.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct nvkm_engine_func -ad102_nvdec = { - .sclass = { - { -1, -1, NVC9B0_VIDEO_DECODER }, - {} - } -}; - -int -ad102_nvdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_nvdec **pnvdec) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_nvdec_new(&ad102_nvdec, device, type, inst, pnvdec); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga100.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga100.c deleted file mode 100644 index 932934227b9c..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga100.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct nvkm_engine_func -ga100_nvdec = { - .sclass = { - { -1, -1, NVC6B0_VIDEO_DECODER }, - {} - } -}; - -int -ga100_nvdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_nvdec **pnvdec) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_nvdec_new(&ga100_nvdec, device, type, inst, pnvdec); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga102.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga102.c index 022a9c824304..eea6368adae2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga102.c @@ -23,16 +23,6 @@ #include <subdev/gsp.h> -#include <nvif/class.h> - -static const struct nvkm_engine_func -ga102_nvdec_gsp = { - .sclass = { - { -1, -1, NVC7B0_VIDEO_DECODER }, - {} - } -}; - static const struct nvkm_falcon_func ga102_nvdec_flcn = { .disable = gm200_flcn_disable, @@ -67,7 +57,7 @@ ga102_nvdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst struct nvkm_nvdec **pnvdec) { if (nvkm_gsp_rm(device->gsp)) - return r535_nvdec_new(&ga102_nvdec_gsp, device, type, inst, pnvdec); + return -ENODEV; return nvkm_nvdec_new_(ga102_nvdec_fwif, device, type, inst, 0x848000, pnvdec); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/priv.h index f506ae83bfd7..f8d43e913093 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/priv.h @@ -20,7 +20,4 @@ extern const struct nvkm_nvdec_fwif gm107_nvdec_fwif[]; int nvkm_nvdec_new_(const struct nvkm_nvdec_fwif *fwif, struct nvkm_device *, enum nvkm_subdev_type, int, u32 addr, struct nvkm_nvdec **); - -int r535_nvdec_new(const struct nvkm_engine_func *, struct nvkm_device *, - enum nvkm_subdev_type, int, struct nvkm_nvdec **); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/r535.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/r535.c deleted file mode 100644 index 75a24f3e6617..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/r535.c +++ /dev/null @@ -1,110 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <core/object.h> -#include <subdev/gsp.h> -#include <engine/fifo.h> - -#include <nvrm/nvtypes.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/nvos.h> - -struct r535_nvdec_obj { - struct nvkm_object object; - struct nvkm_gsp_object rm; -}; - -static void * -r535_nvdec_obj_dtor(struct nvkm_object *object) -{ - struct r535_nvdec_obj *obj = container_of(object, typeof(*obj), object); - - nvkm_gsp_rm_free(&obj->rm); - return obj; -} - -static const struct nvkm_object_func -r535_nvdec_obj = { - .dtor = r535_nvdec_obj_dtor, -}; - -static int -r535_nvdec_obj_ctor(const struct nvkm_oclass *oclass, void *argv, u32 argc, - struct nvkm_object **pobject) -{ - struct nvkm_chan *chan = nvkm_uchan_chan(oclass->parent); - struct r535_nvdec_obj *obj; - NV_BSP_ALLOCATION_PARAMETERS *args; - - if (!(obj = kzalloc(sizeof(*obj), GFP_KERNEL))) - return -ENOMEM; - - nvkm_object_ctor(&r535_nvdec_obj, oclass, &obj->object); - *pobject = &obj->object; - - args = nvkm_gsp_rm_alloc_get(&chan->rm.object, oclass->handle, oclass->base.oclass, - sizeof(*args), &obj->rm); - if (WARN_ON(IS_ERR(args))) - return PTR_ERR(args); - - args->size = sizeof(*args); - args->engineInstance = oclass->engine->subdev.inst; - - return nvkm_gsp_rm_alloc_wr(&obj->rm, args); -} - -static void * -r535_nvdec_dtor(struct nvkm_engine *engine) -{ - struct nvkm_nvdec *nvdec = nvkm_nvdec(engine); - - kfree(nvdec->engine.func); - return nvdec; -} - -int -r535_nvdec_new(const struct nvkm_engine_func *hw, struct nvkm_device *device, - enum nvkm_subdev_type type, int inst, struct nvkm_nvdec **pnvdec) -{ - struct nvkm_engine_func *rm; - int nclass; - - for (nclass = 0; hw->sclass[nclass].oclass; nclass++); - - if (!(rm = kzalloc(sizeof(*rm) + (nclass + 1) * sizeof(rm->sclass[0]), GFP_KERNEL))) - return -ENOMEM; - - rm->dtor = r535_nvdec_dtor; - for (int i = 0; i < nclass; i++) { - rm->sclass[i].minver = hw->sclass[i].minver; - rm->sclass[i].maxver = hw->sclass[i].maxver; - rm->sclass[i].oclass = hw->sclass[i].oclass; - rm->sclass[i].ctor = r535_nvdec_obj_ctor; - } - - if (!(*pnvdec = kzalloc(sizeof(**pnvdec), GFP_KERNEL))) { - kfree(rm); - return -ENOMEM; - } - - return nvkm_engine_ctor(rm, device, type, inst, true, &(*pnvdec)->engine); -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/tu102.c index 808c8e010b9e..fe95b6e22f21 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/tu102.c @@ -23,22 +23,12 @@ #include <subdev/gsp.h> -#include <nvif/class.h> - -static const struct nvkm_engine_func -tu102_nvdec = { - .sclass = { - { -1, -1, NVC4B0_VIDEO_DECODER }, - {} - } -}; - int tu102_nvdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_nvdec **pnvdec) { if (nvkm_gsp_rm(device->gsp)) - return r535_nvdec_new(&tu102_nvdec, device, type, inst, pnvdec); + return -ENODEV; return nvkm_nvdec_new_(gm107_nvdec_fwif, device, type, inst, 0, pnvdec); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild index 2c1495b730f3..6dcb20d1d156 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild @@ -2,7 +2,3 @@ nvkm-y += nvkm/engine/nvenc/base.o nvkm-y += nvkm/engine/nvenc/gm107.o nvkm-y += nvkm/engine/nvenc/tu102.o -nvkm-y += nvkm/engine/nvenc/ga102.o -nvkm-y += nvkm/engine/nvenc/ad102.o - -nvkm-y += nvkm/engine/nvenc/r535.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/ad102.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/ad102.c deleted file mode 100644 index 1b4619ff9e8e..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/ad102.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct nvkm_engine_func -ad102_nvenc = { - .sclass = { - { -1, -1, NVC9B7_VIDEO_ENCODER }, - {} - } -}; - -int -ad102_nvenc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_nvenc **pnvenc) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_nvenc_new(&ad102_nvenc, device, type, inst, pnvenc); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/ga102.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/ga102.c deleted file mode 100644 index 6463ab8e5871..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/ga102.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct nvkm_engine_func -ga102_nvenc = { - .sclass = { - { -1, -1, NVC7B7_VIDEO_ENCODER }, - {} - } -}; - -int -ga102_nvenc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_nvenc **pnvenc) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_nvenc_new(&ga102_nvenc, device, type, inst, pnvenc); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h index 7917affc6505..b097e3f2867b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h @@ -18,7 +18,4 @@ extern const struct nvkm_nvenc_fwif gm107_nvenc_fwif[]; int nvkm_nvenc_new_(const struct nvkm_nvenc_fwif *, struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_nvenc **pnvenc); - -int r535_nvenc_new(const struct nvkm_engine_func *, struct nvkm_device *, - enum nvkm_subdev_type, int, struct nvkm_nvenc **); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/r535.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/r535.c deleted file mode 100644 index c8a2a9196ce5..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/r535.c +++ /dev/null @@ -1,110 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <core/object.h> -#include <subdev/gsp.h> -#include <engine/fifo.h> - -#include <nvrm/nvtypes.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/nvos.h> - -struct r535_nvenc_obj { - struct nvkm_object object; - struct nvkm_gsp_object rm; -}; - -static void * -r535_nvenc_obj_dtor(struct nvkm_object *object) -{ - struct r535_nvenc_obj *obj = container_of(object, typeof(*obj), object); - - nvkm_gsp_rm_free(&obj->rm); - return obj; -} - -static const struct nvkm_object_func -r535_nvenc_obj = { - .dtor = r535_nvenc_obj_dtor, -}; - -static int -r535_nvenc_obj_ctor(const struct nvkm_oclass *oclass, void *argv, u32 argc, - struct nvkm_object **pobject) -{ - struct nvkm_chan *chan = nvkm_uchan_chan(oclass->parent); - struct r535_nvenc_obj *obj; - NV_MSENC_ALLOCATION_PARAMETERS *args; - - if (!(obj = kzalloc(sizeof(*obj), GFP_KERNEL))) - return -ENOMEM; - - nvkm_object_ctor(&r535_nvenc_obj, oclass, &obj->object); - *pobject = &obj->object; - - args = nvkm_gsp_rm_alloc_get(&chan->rm.object, oclass->handle, oclass->base.oclass, - sizeof(*args), &obj->rm); - if (WARN_ON(IS_ERR(args))) - return PTR_ERR(args); - - args->size = sizeof(*args); - args->engineInstance = oclass->engine->subdev.inst; - - return nvkm_gsp_rm_alloc_wr(&obj->rm, args); -} - -static void * -r535_nvenc_dtor(struct nvkm_engine *engine) -{ - struct nvkm_nvenc *nvenc = nvkm_nvenc(engine); - - kfree(nvenc->engine.func); - return nvenc; -} - -int -r535_nvenc_new(const struct nvkm_engine_func *hw, struct nvkm_device *device, - enum nvkm_subdev_type type, int inst, struct nvkm_nvenc **pnvenc) -{ - struct nvkm_engine_func *rm; - int nclass; - - for (nclass = 0; hw->sclass[nclass].oclass; nclass++); - - if (!(rm = kzalloc(sizeof(*rm) + (nclass + 1) * sizeof(rm->sclass[0]), GFP_KERNEL))) - return -ENOMEM; - - rm->dtor = r535_nvenc_dtor; - for (int i = 0; i < nclass; i++) { - rm->sclass[i].minver = hw->sclass[i].minver; - rm->sclass[i].maxver = hw->sclass[i].maxver; - rm->sclass[i].oclass = hw->sclass[i].oclass; - rm->sclass[i].ctor = r535_nvenc_obj_ctor; - } - - if (!(*pnvenc = kzalloc(sizeof(**pnvenc), GFP_KERNEL))) { - kfree(rm); - return -ENOMEM; - } - - return nvkm_engine_ctor(rm, device, type, inst, true, &(*pnvenc)->engine); -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c index 933864423bb3..8a436b398749 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c @@ -23,22 +23,12 @@ #include <subdev/gsp.h> -#include <nvif/class.h> - -static const struct nvkm_engine_func -tu102_nvenc = { - .sclass = { - { -1, -1, NVC4B7_VIDEO_ENCODER }, - {} - } -}; - int tu102_nvenc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_nvenc **pnvenc) { if (nvkm_gsp_rm(device->gsp)) - return r535_nvenc_new(&tu102_nvenc, device, type, inst, pnvenc); + return -ENODEV; return nvkm_nvenc_new_(gm107_nvenc_fwif, device, type, inst, pnvenc); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/Kbuild deleted file mode 100644 index 1408f664add6..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/Kbuild +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: MIT -nvkm-y += nvkm/engine/nvjpg/ga100.o -nvkm-y += nvkm/engine/nvjpg/ad102.o - -nvkm-y += nvkm/engine/nvjpg/r535.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ad102.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ad102.c deleted file mode 100644 index 62705dc6494c..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ad102.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct nvkm_engine_func -ad102_nvjpg = { - .sclass = { - { -1, -1, NVC9D1_VIDEO_NVJPG }, - {} - } -}; - -int -ad102_nvjpg_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_engine **pengine) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_nvjpg_new(&ad102_nvjpg, device, type, inst, pengine); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ga100.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ga100.c deleted file mode 100644 index f550eb07da5a..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ga100.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct nvkm_engine_func -ga100_nvjpg = { - .sclass = { - { -1, -1, NVC4D1_VIDEO_NVJPG }, - {} - } -}; - -int -ga100_nvjpg_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_engine **pengine) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_nvjpg_new(&ga100_nvjpg, device, type, inst, pengine); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/priv.h deleted file mode 100644 index 1e80cf70033a..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/priv.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -#ifndef __NVKM_NVJPG_PRIV_H__ -#define __NVKM_NVJPG_PRIV_H__ -#include <engine/nvjpg.h> - -int r535_nvjpg_new(const struct nvkm_engine_func *, struct nvkm_device *, - enum nvkm_subdev_type, int, struct nvkm_engine **); -#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/r535.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/r535.c deleted file mode 100644 index 1babddc4eb80..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/r535.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <core/object.h> -#include <subdev/gsp.h> -#include <engine/fifo.h> - -#include <nvrm/nvtypes.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/nvos.h> - -struct r535_nvjpg_obj { - struct nvkm_object object; - struct nvkm_gsp_object rm; -}; - -static void * -r535_nvjpg_obj_dtor(struct nvkm_object *object) -{ - struct r535_nvjpg_obj *obj = container_of(object, typeof(*obj), object); - - nvkm_gsp_rm_free(&obj->rm); - return obj; -} - -static const struct nvkm_object_func -r535_nvjpg_obj = { - .dtor = r535_nvjpg_obj_dtor, -}; - -static int -r535_nvjpg_obj_ctor(const struct nvkm_oclass *oclass, void *argv, u32 argc, - struct nvkm_object **pobject) -{ - struct nvkm_chan *chan = nvkm_uchan_chan(oclass->parent); - struct r535_nvjpg_obj *obj; - NV_NVJPG_ALLOCATION_PARAMETERS *args; - - if (!(obj = kzalloc(sizeof(*obj), GFP_KERNEL))) - return -ENOMEM; - - nvkm_object_ctor(&r535_nvjpg_obj, oclass, &obj->object); - *pobject = &obj->object; - - args = nvkm_gsp_rm_alloc_get(&chan->rm.object, oclass->handle, oclass->base.oclass, - sizeof(*args), &obj->rm); - if (WARN_ON(IS_ERR(args))) - return PTR_ERR(args); - - args->size = sizeof(*args); - args->engineInstance = oclass->engine->subdev.inst; - - return nvkm_gsp_rm_alloc_wr(&obj->rm, args); -} - -static void * -r535_nvjpg_dtor(struct nvkm_engine *engine) -{ - kfree(engine->func); - return engine; -} - -int -r535_nvjpg_new(const struct nvkm_engine_func *hw, struct nvkm_device *device, - enum nvkm_subdev_type type, int inst, struct nvkm_engine **pengine) -{ - struct nvkm_engine_func *rm; - int nclass, ret; - - for (nclass = 0; hw->sclass[nclass].oclass; nclass++); - - if (!(rm = kzalloc(sizeof(*rm) + (nclass + 1) * sizeof(rm->sclass[0]), GFP_KERNEL))) - return -ENOMEM; - - rm->dtor = r535_nvjpg_dtor; - for (int i = 0; i < nclass; i++) { - rm->sclass[i].minver = hw->sclass[i].minver; - rm->sclass[i].maxver = hw->sclass[i].maxver; - rm->sclass[i].oclass = hw->sclass[i].oclass; - rm->sclass[i].ctor = r535_nvjpg_obj_ctor; - } - - ret = nvkm_engine_new_(rm, device, type, inst, true, pengine); - if (ret) - kfree(rm); - - return ret; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/ofa/Kbuild deleted file mode 100644 index 99f1713d7e51..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/Kbuild +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: MIT -nvkm-y += nvkm/engine/ofa/ga100.o -nvkm-y += nvkm/engine/ofa/ga102.o -nvkm-y += nvkm/engine/ofa/ad102.o - -nvkm-y += nvkm/engine/ofa/r535.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ad102.c b/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ad102.c deleted file mode 100644 index 7ac87ef26aec..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ad102.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct nvkm_engine_func -ad102_ofa = { - .sclass = { - { -1, -1, NVC9FA_VIDEO_OFA }, - {} - } -}; - -int -ad102_ofa_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_engine **pengine) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_ofa_new(&ad102_ofa, device, type, inst, pengine); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ga100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ga100.c deleted file mode 100644 index ef474f61a1b5..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ga100.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct nvkm_engine_func -ga100_ofa = { - .sclass = { - { -1, -1, NVC6FA_VIDEO_OFA }, - {} - } -}; - -int -ga100_ofa_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_engine **pengine) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_ofa_new(&ga100_ofa, device, type, inst, pengine); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ga102.c b/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ga102.c deleted file mode 100644 index bea255529993..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ga102.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <subdev/gsp.h> - -#include <nvif/class.h> - -static const struct nvkm_engine_func -ga102_ofa = { - .sclass = { - { -1, -1, NVC7FA_VIDEO_OFA }, - {} - } -}; - -int -ga102_ofa_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_engine **pengine) -{ - if (nvkm_gsp_rm(device->gsp)) - return r535_ofa_new(&ga102_ofa, device, type, inst, pengine); - - return -ENODEV; -} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/ofa/priv.h deleted file mode 100644 index caf29e6bddb4..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/priv.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -#ifndef __NVKM_OFA_PRIV_H__ -#define __NVKM_OFA_PRIV_H__ -#include <engine/ofa.h> - -int r535_ofa_new(const struct nvkm_engine_func *, struct nvkm_device *, - enum nvkm_subdev_type, int, struct nvkm_engine **); -#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/r535.c b/drivers/gpu/drm/nouveau/nvkm/engine/ofa/r535.c deleted file mode 100644 index 438dc692eefe..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/r535.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright 2023 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "priv.h" - -#include <core/object.h> -#include <subdev/gsp.h> -#include <subdev/mmu.h> -#include <engine/fifo.h> - -#include <nvrm/nvtypes.h> -#include <nvrm/535.113.01/common/sdk/nvidia/inc/nvos.h> - -struct r535_ofa_obj { - struct nvkm_object object; - struct nvkm_gsp_object rm; -}; - -static void * -r535_ofa_obj_dtor(struct nvkm_object *object) -{ - struct r535_ofa_obj *obj = container_of(object, typeof(*obj), object); - - nvkm_gsp_rm_free(&obj->rm); - return obj; -} - -static const struct nvkm_object_func -r535_ofa_obj = { - .dtor = r535_ofa_obj_dtor, -}; - -static int -r535_ofa_obj_ctor(const struct nvkm_oclass *oclass, void *argv, u32 argc, - struct nvkm_object **pobject) -{ - struct nvkm_chan *chan = nvkm_uchan_chan(oclass->parent); - struct r535_ofa_obj *obj; - NV_OFA_ALLOCATION_PARAMETERS *args; - - if (!(obj = kzalloc(sizeof(*obj), GFP_KERNEL))) - return -ENOMEM; - - nvkm_object_ctor(&r535_ofa_obj, oclass, &obj->object); - *pobject = &obj->object; - - args = nvkm_gsp_rm_alloc_get(&chan->rm.object, oclass->handle, oclass->base.oclass, - sizeof(*args), &obj->rm); - if (WARN_ON(IS_ERR(args))) - return PTR_ERR(args); - - args->size = sizeof(*args); - - return nvkm_gsp_rm_alloc_wr(&obj->rm, args); -} - -static void * -r535_ofa_dtor(struct nvkm_engine *engine) -{ - kfree(engine->func); - return engine; -} - -int -r535_ofa_new(const struct nvkm_engine_func *hw, struct nvkm_device *device, - enum nvkm_subdev_type type, int inst, struct nvkm_engine **pengine) -{ - struct nvkm_engine_func *rm; - int nclass, ret; - - for (nclass = 0; hw->sclass[nclass].oclass; nclass++); - - if (!(rm = kzalloc(sizeof(*rm) + (nclass + 1) * sizeof(rm->sclass[0]), GFP_KERNEL))) - return -ENOMEM; - - rm->dtor = r535_ofa_dtor; - for (int i = 0; i < nclass; i++) { - rm->sclass[i].minver = hw->sclass[i].minver; - rm->sclass[i].maxver = hw->sclass[i].maxver; - rm->sclass[i].oclass = hw->sclass[i].oclass; - rm->sclass[i].ctor = r535_ofa_obj_ctor; - } - - ret = nvkm_engine_new_(rm, device, type, inst, true, pengine); - if (ret) - kfree(rm); - - return ret; -} |