diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_modeset_setup.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_modeset_setup.c | 330 |
1 files changed, 153 insertions, 177 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c index 2c8668b1ebae..8415f3d703ed 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c @@ -6,15 +6,16 @@ * state. */ -#include <drm/drm_atomic_uapi.h> #include <drm/drm_atomic_state_helper.h> +#include <drm/drm_atomic_uapi.h> +#include <drm/drm_print.h> #include <drm/drm_vblank.h> -#include "i915_drv.h" #include "i915_reg.h" #include "i9xx_wm.h" #include "intel_atomic.h" #include "intel_bw.h" +#include "intel_cmtg.h" #include "intel_color.h" #include "intel_crtc.h" #include "intel_crtc_state_dump.h" @@ -22,6 +23,7 @@ #include "intel_de.h" #include "intel_display.h" #include "intel_display_power.h" +#include "intel_display_regs.h" #include "intel_display_types.h" #include "intel_dmc.h" #include "intel_fifo_underrun.h" @@ -30,13 +32,14 @@ #include "intel_pmdemand.h" #include "intel_tc.h" #include "intel_vblank.h" +#include "intel_vga.h" #include "intel_wm.h" #include "skl_watermark.h" static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc, struct drm_modeset_acquire_ctx *ctx) { - struct drm_i915_private *i915 = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); struct intel_plane *plane; @@ -47,7 +50,7 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc, if (!crtc_state->hw.active) return; - for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) { + for_each_intel_plane_on_crtc(display->drm, crtc, plane) { const struct intel_plane_state *plane_state = to_intel_plane_state(plane->base.state); @@ -55,9 +58,9 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc, intel_plane_disable_noatomic(crtc, plane); } - state = drm_atomic_state_alloc(&i915->drm); + state = drm_atomic_state_alloc(display->drm); if (!state) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "failed to disable [CRTC:%d:%s], out of memory", crtc->base.base.id, crtc->base.name); return; @@ -67,7 +70,7 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc, to_intel_atomic_state(state)->internal = true; /* Everything's already locked, -EDEADLK can't happen. */ - for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, + for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, BIT(pipe) | intel_crtc_joiner_secondary_pipes(crtc_state)) { struct intel_crtc_state *temp_crtc_state = @@ -76,24 +79,24 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc, ret = drm_atomic_add_affected_connectors(state, &temp_crtc->base); - drm_WARN_ON(&i915->drm, IS_ERR(temp_crtc_state) || ret); + drm_WARN_ON(display->drm, IS_ERR(temp_crtc_state) || ret); } - i915->display.funcs.display->crtc_disable(to_intel_atomic_state(state), crtc); + display->funcs.display->crtc_disable(to_intel_atomic_state(state), crtc); drm_atomic_state_put(state); - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] hw state adjusted, was enabled, now disabled\n", crtc->base.base.id, crtc->base.name); crtc->active = false; crtc->base.enabled = false; - if (crtc_state->shared_dpll) - intel_unreference_shared_dpll_crtc(crtc, - crtc_state->shared_dpll, - &crtc_state->shared_dpll->state); + if (crtc_state->intel_dpll) + intel_dpll_crtc_put(crtc, + crtc_state->intel_dpll, + &crtc_state->intel_dpll->state); } static void set_encoder_for_connector(struct intel_connector *connector, @@ -116,19 +119,19 @@ static void set_encoder_for_connector(struct intel_connector *connector, static void reset_encoder_connector_state(struct intel_encoder *encoder) { - struct drm_i915_private *i915 = to_i915(encoder->base.dev); + struct intel_display *display = to_intel_display(encoder); struct intel_pmdemand_state *pmdemand_state = - to_intel_pmdemand_state(i915->display.pmdemand.obj.state); + to_intel_pmdemand_state(display->pmdemand.obj.state); struct intel_connector *connector; struct drm_connector_list_iter conn_iter; - drm_connector_list_iter_begin(&i915->drm, &conn_iter); + drm_connector_list_iter_begin(display->drm, &conn_iter); for_each_intel_connector_iter(connector, &conn_iter) { if (connector->base.encoder != &encoder->base) continue; /* Clear the corresponding bit in pmdemand active phys mask */ - intel_pmdemand_update_phys_mask(i915, encoder, + intel_pmdemand_update_phys_mask(display, encoder, pmdemand_state, false); set_encoder_for_connector(connector, NULL); @@ -141,10 +144,10 @@ static void reset_encoder_connector_state(struct intel_encoder *encoder) static void reset_crtc_encoder_state(struct intel_crtc *crtc) { - struct drm_i915_private *i915 = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); struct intel_encoder *encoder; - for_each_encoder_on_crtc(&i915->drm, &crtc->base, encoder) { + for_each_encoder_on_crtc(display->drm, &crtc->base, encoder) { reset_encoder_connector_state(encoder); encoder->base.crtc = NULL; } @@ -152,15 +155,9 @@ static void reset_crtc_encoder_state(struct intel_crtc *crtc) static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc) { - struct drm_i915_private *i915 = to_i915(crtc->base.dev); - struct intel_bw_state *bw_state = - to_intel_bw_state(i915->display.bw.obj.state); - struct intel_cdclk_state *cdclk_state = - to_intel_cdclk_state(i915->display.cdclk.obj.state); - struct intel_dbuf_state *dbuf_state = - to_intel_dbuf_state(i915->display.dbuf.obj.state); + struct intel_display *display = to_intel_display(crtc); struct intel_pmdemand_state *pmdemand_state = - to_intel_pmdemand_state(i915->display.pmdemand.obj.state); + to_intel_pmdemand_state(display->pmdemand.obj.state); struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); enum pipe pipe = crtc->pipe; @@ -172,33 +169,28 @@ static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc) reset_crtc_encoder_state(crtc); intel_fbc_disable(crtc); - intel_update_watermarks(i915); - - intel_display_power_put_all_in_set(i915, &crtc->enabled_power_domains); - - cdclk_state->min_cdclk[pipe] = 0; - cdclk_state->min_voltage_level[pipe] = 0; - cdclk_state->active_pipes &= ~BIT(pipe); + intel_update_watermarks(display); - dbuf_state->active_pipes &= ~BIT(pipe); + intel_display_power_put_all_in_set(display, &crtc->enabled_power_domains); - bw_state->data_rate[pipe] = 0; - bw_state->num_active_planes[pipe] = 0; + intel_cdclk_crtc_disable_noatomic(crtc); + skl_wm_crtc_disable_noatomic(crtc); + intel_bw_crtc_disable_noatomic(crtc); - intel_pmdemand_update_port_clock(i915, pmdemand_state, pipe, 0); + intel_pmdemand_update_port_clock(display, pmdemand_state, pipe, 0); } /* * Return all the pipes using a transcoder in @transcoder_mask. * For joiner configs return only the joiner primary. */ -static u8 get_transcoder_pipes(struct drm_i915_private *i915, +static u8 get_transcoder_pipes(struct intel_display *display, u8 transcoder_mask) { struct intel_crtc *temp_crtc; u8 pipes = 0; - for_each_intel_crtc(&i915->drm, temp_crtc) { + for_each_intel_crtc(display->drm, temp_crtc) { struct intel_crtc_state *temp_crtc_state = to_intel_crtc_state(temp_crtc->base.state); @@ -223,7 +215,6 @@ static void get_portsync_pipes(struct intel_crtc *crtc, u8 *master_pipe_mask, u8 *slave_pipes_mask) { struct intel_display *display = to_intel_display(crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); struct intel_crtc *master_crtc; @@ -242,20 +233,20 @@ static void get_portsync_pipes(struct intel_crtc *crtc, else master_transcoder = crtc_state->master_transcoder; - *master_pipe_mask = get_transcoder_pipes(i915, BIT(master_transcoder)); - drm_WARN_ON(&i915->drm, !is_power_of_2(*master_pipe_mask)); + *master_pipe_mask = get_transcoder_pipes(display, BIT(master_transcoder)); + drm_WARN_ON(display->drm, !is_power_of_2(*master_pipe_mask)); master_crtc = intel_crtc_for_pipe(display, ffs(*master_pipe_mask) - 1); master_crtc_state = to_intel_crtc_state(master_crtc->base.state); - *slave_pipes_mask = get_transcoder_pipes(i915, master_crtc_state->sync_mode_slaves_mask); + *slave_pipes_mask = get_transcoder_pipes(display, master_crtc_state->sync_mode_slaves_mask); } -static u8 get_joiner_secondary_pipes(struct drm_i915_private *i915, u8 primary_pipes_mask) +static u8 get_joiner_secondary_pipes(struct intel_display *display, u8 primary_pipes_mask) { struct intel_crtc *primary_crtc; u8 pipes = 0; - for_each_intel_crtc_in_pipe_mask(&i915->drm, primary_crtc, primary_pipes_mask) { + for_each_intel_crtc_in_pipe_mask(display->drm, primary_crtc, primary_pipes_mask) { struct intel_crtc_state *primary_crtc_state = to_intel_crtc_state(primary_crtc->base.state); @@ -268,45 +259,45 @@ static u8 get_joiner_secondary_pipes(struct drm_i915_private *i915, u8 primary_p static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, struct drm_modeset_acquire_ctx *ctx) { - struct drm_i915_private *i915 = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); + struct intel_crtc *temp_crtc; u8 portsync_master_mask; u8 portsync_slaves_mask; u8 joiner_secondaries_mask; - struct intel_crtc *temp_crtc; /* TODO: Add support for MST */ get_portsync_pipes(crtc, &portsync_master_mask, &portsync_slaves_mask); - joiner_secondaries_mask = get_joiner_secondary_pipes(i915, + joiner_secondaries_mask = get_joiner_secondary_pipes(display, portsync_master_mask | portsync_slaves_mask); - drm_WARN_ON(&i915->drm, + drm_WARN_ON(display->drm, portsync_master_mask & portsync_slaves_mask || portsync_master_mask & joiner_secondaries_mask || portsync_slaves_mask & joiner_secondaries_mask); - for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, joiner_secondaries_mask) + for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, joiner_secondaries_mask) intel_crtc_disable_noatomic_begin(temp_crtc, ctx); - for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, portsync_slaves_mask) + for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, portsync_slaves_mask) intel_crtc_disable_noatomic_begin(temp_crtc, ctx); - for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, portsync_master_mask) + for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, portsync_master_mask) intel_crtc_disable_noatomic_begin(temp_crtc, ctx); - for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, + for_each_intel_crtc_in_pipe_mask(display->drm, temp_crtc, joiner_secondaries_mask | portsync_slaves_mask | portsync_master_mask) intel_crtc_disable_noatomic_complete(temp_crtc); } -static void intel_modeset_update_connector_atomic_state(struct drm_i915_private *i915) +static void intel_modeset_update_connector_atomic_state(struct intel_display *display) { struct intel_connector *connector; struct drm_connector_list_iter conn_iter; - drm_connector_list_iter_begin(&i915->drm, &conn_iter); + drm_connector_list_iter_begin(display->drm, &conn_iter); for_each_intel_connector_iter(connector, &conn_iter) { struct drm_connector_state *conn_state = connector->base.state; struct intel_encoder *encoder = @@ -328,7 +319,7 @@ static void intel_modeset_update_connector_atomic_state(struct drm_i915_private static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state) { - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); + struct intel_display *display = to_intel_display(crtc_state); if (intel_crtc_is_joiner_secondary(crtc_state)) return; @@ -341,7 +332,7 @@ static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state crtc_state->uapi.adjusted_mode = crtc_state->hw.adjusted_mode; crtc_state->uapi.scaling_filter = crtc_state->hw.scaling_filter; - if (DISPLAY_INFO(i915)->color.degamma_lut_size) { + if (DISPLAY_INFO(display)->color.degamma_lut_size) { /* assume 1:1 mapping */ drm_property_replace_blob(&crtc_state->hw.degamma_lut, crtc_state->pre_csc_lut); @@ -356,7 +347,7 @@ static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state * to gamma_lut as that is the only valid source of LUTs * in the uapi. */ - drm_WARN_ON(&i915->drm, crtc_state->post_csc_lut && + drm_WARN_ON(display->drm, crtc_state->post_csc_lut && crtc_state->pre_csc_lut); drm_property_replace_blob(&crtc_state->hw.degamma_lut, @@ -375,15 +366,14 @@ static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state } static void -intel_sanitize_plane_mapping(struct drm_i915_private *i915) +intel_sanitize_plane_mapping(struct intel_display *display) { - struct intel_display *display = &i915->display; struct intel_crtc *crtc; - if (DISPLAY_VER(i915) >= 4) + if (DISPLAY_VER(display) >= 4) return; - for_each_intel_crtc(&i915->drm, crtc) { + for_each_intel_crtc(display->drm, crtc) { struct intel_plane *plane = to_intel_plane(crtc->base.primary); struct intel_crtc *plane_crtc; @@ -395,7 +385,7 @@ intel_sanitize_plane_mapping(struct drm_i915_private *i915) if (pipe == crtc->pipe) continue; - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] attached to the wrong pipe, disabling plane\n", plane->base.base.id, plane->base.name); @@ -432,12 +422,12 @@ static bool intel_crtc_needs_link_reset(struct intel_crtc *crtc) static struct intel_connector *intel_encoder_find_connector(struct intel_encoder *encoder) { - struct drm_i915_private *i915 = to_i915(encoder->base.dev); + struct intel_display *display = to_intel_display(encoder); struct drm_connector_list_iter conn_iter; struct intel_connector *connector; struct intel_connector *found_connector = NULL; - drm_connector_list_iter_begin(&i915->drm, &conn_iter); + drm_connector_list_iter_begin(display->drm, &conn_iter); for_each_intel_connector_iter(connector, &conn_iter) { if (&encoder->base == connector->base.encoder) { found_connector = connector; @@ -451,8 +441,8 @@ static struct intel_connector *intel_encoder_find_connector(struct intel_encoder static void intel_sanitize_fifo_underrun_reporting(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct drm_i915_private *i915 = to_i915(crtc->base.dev); /* * We start out with underrun reporting disabled on active @@ -467,15 +457,15 @@ static void intel_sanitize_fifo_underrun_reporting(const struct intel_crtc_state * No protection against concurrent access is required - at * worst a fifo underrun happens which also sets this to false. */ - intel_init_fifo_underrun_reporting(i915, crtc, + intel_init_fifo_underrun_reporting(display, crtc, !crtc_state->hw.active && - !HAS_GMCH(i915)); + !HAS_GMCH(display)); } static bool intel_sanitize_crtc(struct intel_crtc *crtc, struct drm_modeset_acquire_ctx *ctx) { - struct drm_i915_private *i915 = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(crtc); struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); bool needs_link_reset; @@ -483,7 +473,7 @@ static bool intel_sanitize_crtc(struct intel_crtc *crtc, struct intel_plane *plane; /* Disable everything but the primary plane */ - for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) { + for_each_intel_plane_on_crtc(display->drm, crtc, plane) { const struct intel_plane_state *plane_state = to_intel_plane_state(plane->base.state); @@ -524,7 +514,7 @@ static bool intel_sanitize_crtc(struct intel_crtc *crtc, return true; } -static void intel_sanitize_all_crtcs(struct drm_i915_private *i915, +static void intel_sanitize_all_crtcs(struct intel_display *display, struct drm_modeset_acquire_ctx *ctx) { struct intel_crtc *crtc; @@ -539,7 +529,7 @@ static void intel_sanitize_all_crtcs(struct drm_i915_private *i915, for (;;) { u32 old_mask = crtcs_forced_off; - for_each_intel_crtc(&i915->drm, crtc) { + for_each_intel_crtc(display->drm, crtc) { u32 crtc_mask = drm_crtc_mask(&crtc->base); if (crtcs_forced_off & crtc_mask) @@ -552,7 +542,7 @@ static void intel_sanitize_all_crtcs(struct drm_i915_private *i915, break; } - for_each_intel_crtc(&i915->drm, crtc) { + for_each_intel_crtc(display->drm, crtc) { struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); @@ -562,7 +552,7 @@ static void intel_sanitize_all_crtcs(struct drm_i915_private *i915, static bool has_bogus_dpll_config(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); + struct intel_display *display = to_intel_display(crtc_state); /* * Some SNB BIOSen (eg. ASUS K53SV) are known to misprogram @@ -574,21 +564,21 @@ static bool has_bogus_dpll_config(const struct intel_crtc_state *crtc_state) * without several WARNs, but for now let's take the easy * road. */ - return IS_SANDYBRIDGE(i915) && + return display->platform.sandybridge && crtc_state->hw.active && - crtc_state->shared_dpll && + crtc_state->intel_dpll && crtc_state->port_clock == 0; } static void intel_sanitize_encoder(struct intel_encoder *encoder) { - struct drm_i915_private *i915 = to_i915(encoder->base.dev); + struct intel_display *display = to_intel_display(encoder); struct intel_connector *connector; struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); struct intel_crtc_state *crtc_state = crtc ? to_intel_crtc_state(crtc->base.state) : NULL; struct intel_pmdemand_state *pmdemand_state = - to_intel_pmdemand_state(i915->display.pmdemand.obj.state); + to_intel_pmdemand_state(display->pmdemand.obj.state); /* * We need to check both for a crtc link (meaning that the encoder is @@ -599,7 +589,7 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder) crtc_state->hw.active; if (crtc_state && has_bogus_dpll_config(crtc_state)) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "BIOS has misprogrammed the hardware. Disabling pipe %c\n", pipe_name(crtc->pipe)); has_active_crtc = false; @@ -607,13 +597,13 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder) connector = intel_encoder_find_connector(encoder); if (connector && !has_active_crtc) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[ENCODER:%d:%s] has active connectors but no active pipe!\n", encoder->base.base.id, encoder->base.name); /* Clear the corresponding bit in pmdemand active phys mask */ - intel_pmdemand_update_phys_mask(i915, encoder, + intel_pmdemand_update_phys_mask(display, encoder, pmdemand_state, false); /* @@ -624,7 +614,7 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder) if (crtc_state) { struct drm_encoder *best_encoder; - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[ENCODER:%d:%s] manually disabled\n", encoder->base.base.id, encoder->base.name); @@ -658,18 +648,17 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder) /* notify opregion of the sanitized encoder state */ intel_opregion_notify_encoder(encoder, connector && has_active_crtc); - if (HAS_DDI(i915)) + if (HAS_DDI(display)) intel_ddi_sanitize_encoder_pll_mapping(encoder); } /* FIXME read out full plane state for all planes */ -static void readout_plane_state(struct drm_i915_private *i915) +static void readout_plane_state(struct intel_display *display) { - struct intel_display *display = &i915->display; struct intel_plane *plane; struct intel_crtc *crtc; - for_each_intel_plane(&i915->drm, plane) { + for_each_intel_plane(display->drm, plane) { struct intel_plane_state *plane_state = to_intel_plane_state(plane->base.state); struct intel_crtc_state *crtc_state; @@ -683,13 +672,13 @@ static void readout_plane_state(struct drm_i915_private *i915) intel_set_plane_visible(crtc_state, plane_state, visible); - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] hw state readout: %s, pipe %c\n", plane->base.base.id, plane->base.name, str_enabled_disabled(visible), pipe_name(pipe)); } - for_each_intel_crtc(&i915->drm, crtc) { + for_each_intel_crtc(display->drm, crtc) { struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); @@ -697,23 +686,17 @@ static void readout_plane_state(struct drm_i915_private *i915) } } -static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) +static void intel_modeset_readout_hw_state(struct intel_display *display) { - struct intel_display *display = &i915->display; - struct intel_cdclk_state *cdclk_state = - to_intel_cdclk_state(i915->display.cdclk.obj.state); - struct intel_dbuf_state *dbuf_state = - to_intel_dbuf_state(i915->display.dbuf.obj.state); struct intel_pmdemand_state *pmdemand_state = - to_intel_pmdemand_state(i915->display.pmdemand.obj.state); + to_intel_pmdemand_state(display->pmdemand.obj.state); enum pipe pipe; struct intel_crtc *crtc; struct intel_encoder *encoder; struct intel_connector *connector; struct drm_connector_list_iter conn_iter; - u8 active_pipes = 0; - for_each_intel_crtc(&i915->drm, crtc) { + for_each_intel_crtc(display->drm, crtc) { struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); @@ -728,21 +711,15 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) crtc->base.enabled = crtc_state->hw.enable; crtc->active = crtc_state->hw.active; - if (crtc_state->hw.active) - active_pipes |= BIT(crtc->pipe); - - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CRTC:%d:%s] hw state readout: %s\n", crtc->base.base.id, crtc->base.name, str_enabled_disabled(crtc_state->hw.active)); } - cdclk_state->active_pipes = active_pipes; - dbuf_state->active_pipes = active_pipes; - - readout_plane_state(i915); + readout_plane_state(display); - for_each_intel_encoder(&i915->drm, encoder) { + for_each_intel_encoder(display->drm, encoder) { struct intel_crtc_state *crtc_state = NULL; pipe = 0; @@ -761,7 +738,7 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) /* encoder should read be linked to joiner primary */ WARN_ON(intel_crtc_is_joiner_secondary(crtc_state)); - for_each_intel_crtc_in_pipe_mask(&i915->drm, secondary_crtc, + for_each_intel_crtc_in_pipe_mask(display->drm, secondary_crtc, intel_crtc_joiner_secondary_pipes(crtc_state)) { struct intel_crtc_state *secondary_crtc_state; @@ -770,11 +747,11 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) } } - intel_pmdemand_update_phys_mask(i915, encoder, + intel_pmdemand_update_phys_mask(display, encoder, pmdemand_state, true); } else { - intel_pmdemand_update_phys_mask(i915, encoder, + intel_pmdemand_update_phys_mask(display, encoder, pmdemand_state, false); @@ -784,16 +761,16 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) if (encoder->sync_state) encoder->sync_state(encoder, crtc_state); - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[ENCODER:%d:%s] hw state readout: %s, pipe %c\n", encoder->base.base.id, encoder->base.name, str_enabled_disabled(encoder->base.crtc), pipe_name(pipe)); } - intel_dpll_readout_hw_state(i915); + intel_dpll_readout_hw_state(display); - drm_connector_list_iter_begin(&i915->drm, &conn_iter); + drm_connector_list_iter_begin(display->drm, &conn_iter); for_each_intel_connector_iter(connector, &conn_iter) { struct intel_crtc_state *crtc_state = NULL; @@ -827,40 +804,37 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) if (connector->sync_state) connector->sync_state(connector, crtc_state); - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] hw state readout: %s\n", connector->base.base.id, connector->base.name, str_enabled_disabled(connector->base.encoder)); } drm_connector_list_iter_end(&conn_iter); - for_each_intel_crtc(&i915->drm, crtc) { - struct intel_bw_state *bw_state = - to_intel_bw_state(i915->display.bw.obj.state); + for_each_intel_crtc(display->drm, crtc) { struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); struct intel_plane *plane; - int min_cdclk = 0; - if (crtc_state->hw.active) { - /* - * The initial mode needs to be set in order to keep - * the atomic core happy. It wants a valid mode if the - * crtc's enabled, so we do the above call. - * - * But we don't set all the derived state fully, hence - * set a flag to indicate that a full recalculation is - * needed on the next commit. - */ - crtc_state->inherited = true; + /* + * The initial mode needs to be set in order to keep + * the atomic core happy. It wants a valid mode if the + * crtc's enabled, so we do the above call. + * + * But we don't set all the derived state fully, hence + * set a flag to indicate that a full recalculation is + * needed on the next commit. + */ + crtc_state->inherited = true; + if (crtc_state->hw.active) { intel_crtc_update_active_timings(crtc_state, crtc_state->vrr.enable); intel_crtc_copy_hw_to_uapi_state(crtc_state); } - for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) { + for_each_intel_plane_on_crtc(display->drm, crtc, plane) { const struct intel_plane_state *plane_state = to_intel_plane_state(plane->base.state); @@ -876,44 +850,39 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) * use plane->min_cdclk() :( */ if (plane_state->uapi.visible && plane->min_cdclk) { - if (crtc_state->double_wide || DISPLAY_VER(i915) >= 10) + if (crtc_state->double_wide || DISPLAY_VER(display) >= 10) crtc_state->min_cdclk[plane->id] = DIV_ROUND_UP(crtc_state->pixel_rate, 2); else crtc_state->min_cdclk[plane->id] = crtc_state->pixel_rate; } - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[PLANE:%d:%s] min_cdclk %d kHz\n", plane->base.base.id, plane->base.name, crtc_state->min_cdclk[plane->id]); } - if (crtc_state->hw.active) { - min_cdclk = intel_crtc_compute_min_cdclk(crtc_state); - if (drm_WARN_ON(&i915->drm, min_cdclk < 0)) - min_cdclk = 0; - } - - cdclk_state->min_cdclk[crtc->pipe] = min_cdclk; - cdclk_state->min_voltage_level[crtc->pipe] = - crtc_state->min_voltage_level; - - intel_pmdemand_update_port_clock(i915, pmdemand_state, pipe, + intel_pmdemand_update_port_clock(display, pmdemand_state, pipe, crtc_state->port_clock); - - intel_bw_crtc_update(bw_state, crtc_state); } - intel_pmdemand_init_pmdemand_params(i915, pmdemand_state); + /* TODO move here (or even earlier?) on all platforms */ + if (DISPLAY_VER(display) >= 9) + intel_wm_get_hw_state(display); + + intel_bw_update_hw_state(display); + intel_cdclk_update_hw_state(display); + + intel_pmdemand_init_pmdemand_params(display, pmdemand_state); } static void -get_encoder_power_domains(struct drm_i915_private *i915) +get_encoder_power_domains(struct intel_display *display) { struct intel_encoder *encoder; - for_each_intel_encoder(&i915->drm, encoder) { + for_each_intel_encoder(display->drm, encoder) { struct intel_crtc_state *crtc_state; if (!encoder->get_power_domains) @@ -931,55 +900,59 @@ get_encoder_power_domains(struct drm_i915_private *i915) } } -static void intel_early_display_was(struct drm_i915_private *i915) +static void intel_early_display_was(struct intel_display *display) { /* * Display WA #1185 WaDisableDARBFClkGating:glk,icl,ehl,tgl * Also known as Wa_14010480278. */ - if (IS_DISPLAY_VER(i915, 10, 12)) - intel_de_rmw(i915, GEN9_CLKGATE_DIS_0, 0, DARBF_GATING_DIS); + if (IS_DISPLAY_VER(display, 10, 12)) + intel_de_rmw(display, GEN9_CLKGATE_DIS_0, 0, DARBF_GATING_DIS); /* * WaRsPkgCStateDisplayPMReq:hsw * System hang if this isn't done before disabling all planes! */ - if (IS_HASWELL(i915)) - intel_de_rmw(i915, CHICKEN_PAR1_1, 0, FORCE_ARB_IDLE_PLANES); + if (display->platform.haswell) + intel_de_rmw(display, CHICKEN_PAR1_1, 0, FORCE_ARB_IDLE_PLANES); - if (IS_KABYLAKE(i915) || IS_COFFEELAKE(i915) || IS_COMETLAKE(i915)) { + if (display->platform.kabylake || display->platform.coffeelake || + display->platform.cometlake) { /* Display WA #1142:kbl,cfl,cml */ - intel_de_rmw(i915, CHICKEN_PAR1_1, + intel_de_rmw(display, CHICKEN_PAR1_1, KBL_ARB_FILL_SPARE_22, KBL_ARB_FILL_SPARE_22); - intel_de_rmw(i915, CHICKEN_MISC_2, + intel_de_rmw(display, CHICKEN_MISC_2, KBL_ARB_FILL_SPARE_13 | KBL_ARB_FILL_SPARE_14, KBL_ARB_FILL_SPARE_14); } } -void intel_modeset_setup_hw_state(struct drm_i915_private *i915, +void intel_modeset_setup_hw_state(struct intel_display *display, struct drm_modeset_acquire_ctx *ctx) { - struct intel_display *display = &i915->display; struct intel_encoder *encoder; struct intel_crtc *crtc; intel_wakeref_t wakeref; - wakeref = intel_display_power_get(i915, POWER_DOMAIN_INIT); + wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT); + + intel_early_display_was(display); + intel_vga_disable(display); - intel_early_display_was(i915); - intel_modeset_readout_hw_state(i915); + intel_modeset_readout_hw_state(display); /* HW state is read out, now we need to sanitize this mess. */ - get_encoder_power_domains(i915); + get_encoder_power_domains(display); + + intel_pch_sanitize(display); - intel_pch_sanitize(i915); + intel_cmtg_sanitize(display); /* * intel_sanitize_plane_mapping() may need to do vblank * waits, so we need vblank interrupts restored beforehand. */ - for_each_intel_crtc(&i915->drm, crtc) { + for_each_intel_crtc(display->drm, crtc) { struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); @@ -988,41 +961,44 @@ void intel_modeset_setup_hw_state(struct drm_i915_private *i915, drm_crtc_vblank_reset(&crtc->base); if (crtc_state->hw.active) { - intel_dmc_enable_pipe(display, crtc->pipe); + intel_dmc_enable_pipe(crtc_state); intel_crtc_vblank_on(crtc_state); } } - intel_fbc_sanitize(&i915->display); + intel_fbc_sanitize(display); - intel_sanitize_plane_mapping(i915); + intel_sanitize_plane_mapping(display); - for_each_intel_encoder(&i915->drm, encoder) + for_each_intel_encoder(display->drm, encoder) intel_sanitize_encoder(encoder); /* * Sanitizing CRTCs needs their connector atomic state to be * up-to-date, so ensure that already here. */ - intel_modeset_update_connector_atomic_state(i915); + intel_modeset_update_connector_atomic_state(display); - intel_sanitize_all_crtcs(i915, ctx); + intel_sanitize_all_crtcs(display, ctx); - intel_dpll_sanitize_state(i915); + intel_dpll_sanitize_state(display); - intel_wm_get_hw_state(i915); + /* TODO move earlier on all platforms */ + if (DISPLAY_VER(display) < 9) + intel_wm_get_hw_state(display); + intel_wm_sanitize(display); - for_each_intel_crtc(&i915->drm, crtc) { + for_each_intel_crtc(display->drm, crtc) { struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); struct intel_power_domain_mask put_domains; intel_modeset_get_crtc_power_domains(crtc_state, &put_domains); - if (drm_WARN_ON(&i915->drm, !bitmap_empty(put_domains.bits, POWER_DOMAIN_NUM))) + if (drm_WARN_ON(display->drm, !bitmap_empty(put_domains.bits, POWER_DOMAIN_NUM))) intel_modeset_put_crtc_power_domains(crtc, &put_domains); } - intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref); + intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref); - intel_power_domains_sanitize_state(i915); + intel_power_domains_sanitize_state(display); } |