diff options
Diffstat (limited to 'arch/xtensa/include')
| -rw-r--r-- | arch/xtensa/include/asm/Kbuild | 1 | ||||
| -rw-r--r-- | arch/xtensa/include/asm/dma-mapping.h | 26 | ||||
| -rw-r--r-- | arch/xtensa/include/asm/kmem_layout.h | 6 | ||||
| -rw-r--r-- | arch/xtensa/include/asm/pgtable.h | 8 | ||||
| -rw-r--r-- | arch/xtensa/include/asm/platform.h | 27 |
5 files changed, 36 insertions, 32 deletions
diff --git a/arch/xtensa/include/asm/Kbuild b/arch/xtensa/include/asm/Kbuild index e5e1e61c538c..82c756431b49 100644 --- a/arch/xtensa/include/asm/Kbuild +++ b/arch/xtensa/include/asm/Kbuild @@ -3,6 +3,7 @@ generic-y += compat.h generic-y += device.h generic-y += div64.h generic-y += dma-contiguous.h +generic-y += dma-mapping.h generic-y += emergency-restart.h generic-y += exec.h generic-y += extable.h diff --git a/arch/xtensa/include/asm/dma-mapping.h b/arch/xtensa/include/asm/dma-mapping.h deleted file mode 100644 index 44098800dad7..000000000000 --- a/arch/xtensa/include/asm/dma-mapping.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2003 - 2005 Tensilica Inc. - * Copyright (C) 2015 Cadence Design Systems Inc. - */ - -#ifndef _XTENSA_DMA_MAPPING_H -#define _XTENSA_DMA_MAPPING_H - -#include <asm/cache.h> -#include <asm/io.h> - -#include <linux/mm.h> -#include <linux/scatterlist.h> - -extern const struct dma_map_ops xtensa_dma_map_ops; - -static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) -{ - return &xtensa_dma_map_ops; -} - -#endif /* _XTENSA_DMA_MAPPING_H */ diff --git a/arch/xtensa/include/asm/kmem_layout.h b/arch/xtensa/include/asm/kmem_layout.h index 2317c835a4db..9c12babc016c 100644 --- a/arch/xtensa/include/asm/kmem_layout.h +++ b/arch/xtensa/include/asm/kmem_layout.h @@ -63,12 +63,6 @@ #error XCHAL_KSEG_PADDR is not properly aligned to XCHAL_KSEG_ALIGNMENT #endif -#else - -#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000) -#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000) -#define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000) - #endif #ifndef CONFIG_KASAN diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h index 38802259978f..29cfe421cf41 100644 --- a/arch/xtensa/include/asm/pgtable.h +++ b/arch/xtensa/include/asm/pgtable.h @@ -66,6 +66,7 @@ #define FIRST_USER_ADDRESS 0UL #define FIRST_USER_PGD_NR (FIRST_USER_ADDRESS >> PGDIR_SHIFT) +#ifdef CONFIG_MMU /* * Virtual memory area. We keep a distance to other memory regions to be * on the safe side. We also use this area for cache aliasing. @@ -80,6 +81,13 @@ #define TLBTEMP_SIZE ICACHE_WAY_SIZE #endif +#else + +#define VMALLOC_START __XTENSA_UL_CONST(0) +#define VMALLOC_END __XTENSA_UL_CONST(0xffffffff) + +#endif + /* * For the Xtensa architecture, the PTE layout is as follows: * diff --git a/arch/xtensa/include/asm/platform.h b/arch/xtensa/include/asm/platform.h index f8fbef67bc5f..560483356a06 100644 --- a/arch/xtensa/include/asm/platform.h +++ b/arch/xtensa/include/asm/platform.h @@ -75,4 +75,31 @@ extern void platform_calibrate_ccount (void); */ void cpu_reset(void) __attribute__((noreturn)); +/* + * Memory caching is platform-dependent in noMMU xtensa configurations. + * The following set of functions should be implemented in platform code + * in order to enable coherent DMA memory operations when CONFIG_MMU is not + * enabled. Default implementations do nothing and issue a warning. + */ + +/* + * Check whether p points to a cached memory. + */ +bool platform_vaddr_cached(const void *p); + +/* + * Check whether p points to an uncached memory. + */ +bool platform_vaddr_uncached(const void *p); + +/* + * Return pointer to an uncached view of the cached sddress p. + */ +void *platform_vaddr_to_uncached(void *p); + +/* + * Return pointer to a cached view of the uncached sddress p. + */ +void *platform_vaddr_to_cached(void *p); + #endif /* _XTENSA_PLATFORM_H */ |