diff options
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7180.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7180.dtsi | 49 |
1 files changed, 33 insertions, 16 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 003309f0d3e1..1ea3344ab62c 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -682,6 +682,11 @@ reg = <0x25b 0x1>; bits = <1 3>; }; + + gpu_speed_bin: gpu_speed_bin@1d2 { + reg = <0x1d2 0x2>; + bits = <5 8>; + }; }; sdhc_1: sdhci@7c4000 { @@ -1466,12 +1471,6 @@ pins = "gpio117"; function = "dp_hot"; }; - - pinconf { - pins = "gpio117"; - bias-disable; - input-enable; - }; }; qspi_clk: qspi-clk { @@ -2058,52 +2057,69 @@ #cooling-cells = <2>; + nvmem-cells = <&gpu_speed_bin>; + nvmem-cell-names = "speed_bin"; + interconnects = <&gem_noc MASTER_GFX3D 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "gfx-mem"; gpu_opp_table: opp-table { compatible = "operating-points-v2"; + opp-825000000 { + opp-hz = /bits/ 64 <825000000>; + opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; + opp-peak-kBps = <8532000>; + opp-supported-hw = <0x04>; + }; + opp-800000000 { opp-hz = /bits/ 64 <800000000>; opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; opp-peak-kBps = <8532000>; + opp-supported-hw = <0x07>; }; opp-650000000 { opp-hz = /bits/ 64 <650000000>; opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; opp-peak-kBps = <7216000>; + opp-supported-hw = <0x07>; }; opp-565000000 { opp-hz = /bits/ 64 <565000000>; opp-level = <RPMH_REGULATOR_LEVEL_NOM>; opp-peak-kBps = <5412000>; + opp-supported-hw = <0x07>; }; opp-430000000 { opp-hz = /bits/ 64 <430000000>; opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; opp-peak-kBps = <5412000>; + opp-supported-hw = <0x07>; }; opp-355000000 { opp-hz = /bits/ 64 <355000000>; opp-level = <RPMH_REGULATOR_LEVEL_SVS>; opp-peak-kBps = <3072000>; + opp-supported-hw = <0x07>; }; opp-267000000 { opp-hz = /bits/ 64 <267000000>; opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; opp-peak-kBps = <3072000>; + opp-supported-hw = <0x07>; }; opp-180000000 { opp-hz = /bits/ 64 <180000000>; opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; opp-peak-kBps = <1804000>; + opp-supported-hw = <0x07>; }; }; }; @@ -3353,6 +3369,7 @@ compatible = "qcom,apss-wdt-sc7180", "qcom,kpss-wdt"; reg = <0 0x17c10000 0 0x1000>; clocks = <&sleep_clk>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; }; timer@17c20000{ @@ -3594,7 +3611,7 @@ }; thermal-zones { - cpu0-thermal { + cpu0_thermal: cpu0-thermal { polling-delay-passive = <250>; polling-delay = <0>; @@ -3643,7 +3660,7 @@ }; }; - cpu1-thermal { + cpu1_thermal: cpu1-thermal { polling-delay-passive = <250>; polling-delay = <0>; @@ -3692,7 +3709,7 @@ }; }; - cpu2-thermal { + cpu2_thermal: cpu2-thermal { polling-delay-passive = <250>; polling-delay = <0>; @@ -3741,7 +3758,7 @@ }; }; - cpu3-thermal { + cpu3_thermal: cpu3-thermal { polling-delay-passive = <250>; polling-delay = <0>; @@ -3790,7 +3807,7 @@ }; }; - cpu4-thermal { + cpu4_thermal: cpu4-thermal { polling-delay-passive = <250>; polling-delay = <0>; @@ -3839,7 +3856,7 @@ }; }; - cpu5-thermal { + cpu5_thermal: cpu5-thermal { polling-delay-passive = <250>; polling-delay = <0>; @@ -3888,7 +3905,7 @@ }; }; - cpu6-thermal { + cpu6_thermal: cpu6-thermal { polling-delay-passive = <250>; polling-delay = <0>; @@ -3929,7 +3946,7 @@ }; }; - cpu7-thermal { + cpu7_thermal: cpu7-thermal { polling-delay-passive = <250>; polling-delay = <0>; @@ -3970,7 +3987,7 @@ }; }; - cpu8-thermal { + cpu8_thermal: cpu8-thermal { polling-delay-passive = <250>; polling-delay = <0>; @@ -4011,7 +4028,7 @@ }; }; - cpu9-thermal { + cpu9_thermal: cpu9-thermal { polling-delay-passive = <250>; polling-delay = <0>; |