diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 120 |
1 files changed, 75 insertions, 45 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index b92abb5a5c53..603dfe80216f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -789,6 +789,23 @@ reg = <IMX8MP_POWER_DOMAIN_USB2_PHY>; }; + pgc_mlmix: power-domain@4 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_MLMIX>; + clocks = <&clk IMX8MP_CLK_ML_AXI>, + <&clk IMX8MP_CLK_ML_AHB>, + <&clk IMX8MP_CLK_NPU_ROOT>; + assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>, + <&clk IMX8MP_CLK_ML_AXI>, + <&clk IMX8MP_CLK_ML_AHB>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, + <&clk IMX8MP_SYS_PLL1_800M>, + <&clk IMX8MP_SYS_PLL1_800M>; + assigned-clock-rates = <800000000>, + <800000000>, + <300000000>; + }; + pgc_audio: power-domain@5 { #power-domain-cells = <0>; reg = <IMX8MP_POWER_DOMAIN_AUDIOMIX>; @@ -821,6 +838,12 @@ assigned-clock-rates = <800000000>, <400000000>; }; + pgc_vpumix: power-domain@8 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_VPUMIX>; + clocks = <&clk IMX8MP_CLK_VPU_ROOT>; + }; + pgc_gpu3d: power-domain@9 { #power-domain-cells = <0>; reg = <IMX8MP_POWER_DOMAIN_GPU3D>; @@ -836,6 +859,28 @@ <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; }; + pgc_vpu_g1: power-domain@11 { + #power-domain-cells = <0>; + power-domains = <&pgc_vpumix>; + reg = <IMX8MP_POWER_DOMAIN_VPU_G1>; + clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>; + }; + + pgc_vpu_g2: power-domain@12 { + #power-domain-cells = <0>; + power-domains = <&pgc_vpumix>; + reg = <IMX8MP_POWER_DOMAIN_VPU_G2>; + clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>; + + }; + + pgc_vpu_vc8000e: power-domain@13 { + #power-domain-cells = <0>; + power-domains = <&pgc_vpumix>; + reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>; + clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; + }; + pgc_hdmimix: power-domain@14 { #power-domain-cells = <0>; reg = <IMX8MP_POWER_DOMAIN_HDMIMIX>; @@ -873,50 +918,6 @@ reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP>; clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>; }; - - pgc_vpumix: power-domain@19 { - #power-domain-cells = <0>; - reg = <IMX8MP_POWER_DOMAIN_VPUMIX>; - clocks = <&clk IMX8MP_CLK_VPU_ROOT>; - }; - - pgc_vpu_g1: power-domain@20 { - #power-domain-cells = <0>; - power-domains = <&pgc_vpumix>; - reg = <IMX8MP_POWER_DOMAIN_VPU_G1>; - clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>; - }; - - pgc_vpu_g2: power-domain@21 { - #power-domain-cells = <0>; - power-domains = <&pgc_vpumix>; - reg = <IMX8MP_POWER_DOMAIN_VPU_G2>; - clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>; - }; - - pgc_vpu_vc8000e: power-domain@22 { - #power-domain-cells = <0>; - power-domains = <&pgc_vpumix>; - reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>; - clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; - }; - - pgc_mlmix: power-domain@24 { - #power-domain-cells = <0>; - reg = <IMX8MP_POWER_DOMAIN_MLMIX>; - clocks = <&clk IMX8MP_CLK_ML_AXI>, - <&clk IMX8MP_CLK_ML_AHB>, - <&clk IMX8MP_CLK_NPU_ROOT>; - assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>, - <&clk IMX8MP_CLK_ML_AXI>, - <&clk IMX8MP_CLK_ML_AHB>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, - <&clk IMX8MP_SYS_PLL1_800M>, - <&clk IMX8MP_SYS_PLL1_800M>; - assigned-clock-rates = <800000000>, - <800000000>, - <300000000>; - }; }; }; }; @@ -1540,6 +1541,31 @@ dma-names = "tx"; status = "disabled"; }; + + xcvr: xcvr@30cc0000 { + compatible = "fsl,imx8mp-xcvr"; + reg = <0x30cc0000 0x800>, + <0x30cc0800 0x400>, + <0x30cc0c00 0x080>, + <0x30cc0e00 0x080>; + reg-names = "ram", "regs", "rxfifo", + "txfifo"; + interrupts = /* XCVR IRQ 0 */ + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + /* XCVR IRQ 1 */ + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + /* XCVR PHY - SPDIF wakeup IRQ */ + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_EARC_IPG>, + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_EARC_PHY>, + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT>, + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT>; + clock-names = "ipg", "phy", "spba", "pll_ipg"; + dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>; + dma-names = "rx", "tx"; + resets = <&audio_blk_ctrl 0>; + status = "disabled"; + }; }; sdma3: dma-controller@30e00000 { @@ -1568,6 +1594,7 @@ compatible = "fsl,imx8mp-audio-blk-ctrl"; reg = <0x30e20000 0x10000>; #clock-cells = <1>; + #reset-cells = <1>; clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>, <&clk IMX8MP_CLK_SAI1>, <&clk IMX8MP_CLK_SAI2>, @@ -1579,6 +1606,9 @@ "sai1", "sai2", "sai3", "sai5", "sai6", "sai7"; power-domains = <&pgc_audio>; + assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>, + <&clk IMX8MP_AUDIO_PLL2>; + assigned-clock-rates = <393216000>, <361267200>; }; }; @@ -1946,7 +1976,7 @@ }; irqsteer_hdmi: interrupt-controller@32fc2000 { - compatible = "fsl,imx-irqsteer"; + compatible = "fsl,imx8mp-irqsteer", "fsl,imx-irqsteer"; reg = <0x32fc2000 0x1000>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; |