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-rw-r--r--Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml228
1 files changed, 115 insertions, 113 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index b0fd96b76ed1..d4bb65c660af 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
@@ -23,6 +23,8 @@ properties:
- qcom,msm8996-dsi-ctrl
- qcom,msm8998-dsi-ctrl
- qcom,qcm2290-dsi-ctrl
+ - qcom,sa8775p-dsi-ctrl
+ - qcom,sar2130p-dsi-ctrl
- qcom,sc7180-dsi-ctrl
- qcom,sc7280-dsi-ctrl
- qcom,sdm660-dsi-ctrl
@@ -30,6 +32,7 @@ properties:
- qcom,sdm845-dsi-ctrl
- qcom,sm6115-dsi-ctrl
- qcom,sm6125-dsi-ctrl
+ - qcom,sm6150-dsi-ctrl
- qcom,sm6350-dsi-ctrl
- qcom,sm6375-dsi-ctrl
- qcom,sm7150-dsi-ctrl
@@ -39,6 +42,7 @@ properties:
- qcom,sm8450-dsi-ctrl
- qcom,sm8550-dsi-ctrl
- qcom,sm8650-dsi-ctrl
+ - qcom,sm8750-dsi-ctrl
- const: qcom,mdss-dsi-ctrl
- enum:
- qcom,dsi-ctrl-6g-qcm2290
@@ -67,11 +71,11 @@ properties:
- mnoc:: MNOC clock
- pixel:: Display pixel clock.
minItems: 3
- maxItems: 9
+ maxItems: 12
clock-names:
minItems: 3
- maxItems: 9
+ maxItems: 12
phys:
maxItems: 1
@@ -106,7 +110,8 @@ properties:
minItems: 2
maxItems: 4
description: |
- Parents of "byte" and "pixel" for the given platform.
+ For DSI on SM8650 and older: parents of "byte" and "pixel" for the given
+ platform.
For DSIv2 platforms this should contain "byte", "esc", "src" and
"pixel_src" clocks.
@@ -215,8 +220,6 @@ required:
- clocks
- clock-names
- phys
- - assigned-clocks
- - assigned-clock-parents
- ports
allOf:
@@ -230,6 +233,7 @@ allOf:
then:
properties:
clocks:
+ minItems: 7
maxItems: 7
clock-names:
items:
@@ -240,6 +244,9 @@ allOf:
- const: byte
- const: pixel
- const: core
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
- if:
properties:
@@ -247,29 +254,12 @@ allOf:
contains:
enum:
- qcom,msm8916-dsi-ctrl
- then:
- properties:
- clocks:
- maxItems: 6
- clock-names:
- items:
- - const: mdp_core
- - const: iface
- - const: bus
- - const: byte
- - const: pixel
- - const: core
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- qcom,msm8953-dsi-ctrl
- qcom,msm8976-dsi-ctrl
then:
properties:
clocks:
+ minItems: 6
maxItems: 6
clock-names:
items:
@@ -279,6 +269,9 @@ allOf:
- const: byte
- const: pixel
- const: core
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
- if:
properties:
@@ -290,6 +283,7 @@ allOf:
then:
properties:
clocks:
+ minItems: 7
maxItems: 7
clock-names:
items:
@@ -300,6 +294,9 @@ allOf:
- const: pixel
- const: core
- const: core_mmss
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
- if:
properties:
@@ -310,6 +307,7 @@ allOf:
then:
properties:
clocks:
+ minItems: 7
maxItems: 7
clock-names:
items:
@@ -320,6 +318,9 @@ allOf:
- const: core_mmss
- const: pixel
- const: core
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
- if:
properties:
@@ -327,11 +328,27 @@ allOf:
contains:
enum:
- qcom,msm8998-dsi-ctrl
+ - qcom,sa8775p-dsi-ctrl
+ - qcom,sar2130p-dsi-ctrl
+ - qcom,sc7180-dsi-ctrl
+ - qcom,sc7280-dsi-ctrl
+ - qcom,sdm845-dsi-ctrl
+ - qcom,sm6115-dsi-ctrl
- qcom,sm6125-dsi-ctrl
- qcom,sm6350-dsi-ctrl
+ - qcom,sm6375-dsi-ctrl
+ - qcom,sm6150-dsi-ctrl
+ - qcom,sm7150-dsi-ctrl
+ - qcom,sm8150-dsi-ctrl
+ - qcom,sm8250-dsi-ctrl
+ - qcom,sm8350-dsi-ctrl
+ - qcom,sm8450-dsi-ctrl
+ - qcom,sm8550-dsi-ctrl
+ - qcom,sm8650-dsi-ctrl
then:
properties:
clocks:
+ minItems: 6
maxItems: 6
clock-names:
items:
@@ -341,25 +358,21 @@ allOf:
- const: core
- const: iface
- const: bus
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
- if:
properties:
compatible:
contains:
enum:
- - qcom,sc7180-dsi-ctrl
- - qcom,sc7280-dsi-ctrl
- - qcom,sm7150-dsi-ctrl
- - qcom,sm8150-dsi-ctrl
- - qcom,sm8250-dsi-ctrl
- - qcom,sm8350-dsi-ctrl
- - qcom,sm8450-dsi-ctrl
- - qcom,sm8550-dsi-ctrl
- - qcom,sm8650-dsi-ctrl
+ - qcom,sm8750-dsi-ctrl
then:
properties:
clocks:
- maxItems: 6
+ minItems: 12
+ maxItems: 12
clock-names:
items:
- const: byte
@@ -368,6 +381,12 @@ allOf:
- const: core
- const: iface
- const: bus
+ - const: dsi_pll_pixel
+ - const: dsi_pll_byte
+ - const: esync
+ - const: osc
+ - const: byte_src
+ - const: pixel_src
- if:
properties:
@@ -378,6 +397,7 @@ allOf:
then:
properties:
clocks:
+ minItems: 9
maxItems: 9
clock-names:
items:
@@ -390,89 +410,71 @@ allOf:
- const: core_mmss
- const: pixel
- const: core
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,sdm845-dsi-ctrl
- - qcom,sm6115-dsi-ctrl
- - qcom,sm6375-dsi-ctrl
- then:
- properties:
- clocks:
- maxItems: 6
- clock-names:
- items:
- - const: byte
- - const: byte_intf
- - const: pixel
- - const: core
- - const: iface
- - const: bus
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
unevaluatedProperties: false
examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
- #include <dt-bindings/clock/qcom,gcc-sdm845.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
-
- dsi@ae94000 {
- compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
- reg = <0x0ae94000 0x400>;
- reg-names = "dsi_ctrl";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- interrupt-parent = <&mdss>;
- interrupts = <4>;
-
- clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
- <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
- <&dispcc DISP_CC_MDSS_ESC0_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AXI_CLK>;
- clock-names = "byte",
- "byte_intf",
- "pixel",
- "core",
- "iface",
- "bus";
-
- phys = <&dsi0_phy>;
- phy-names = "dsi";
-
- assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
- assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
-
- power-domains = <&rpmhpd SC7180_CX>;
- operating-points-v2 = <&dsi_opp_table>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dsi0_in: endpoint {
- remote-endpoint = <&dpu_intf1_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- dsi0_out: endpoint {
- remote-endpoint = <&sn65dsi86_in>;
- data-lanes = <0 1 2 3>;
- qcom,te-source = "mdp_vsync_e";
- };
- };
- };
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
+ #include <dt-bindings/clock/qcom,gcc-sdm845.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ dsi@ae94000 {
+ compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
+ reg = <0x0ae94000 0x400>;
+ reg-names = "dsi_ctrl";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ interrupt-parent = <&mdss>;
+ interrupts = <4>;
+
+ clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
+ <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
+ <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
+ <&dispcc DISP_CC_MDSS_ESC0_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_AXI_CLK>;
+ clock-names = "byte",
+ "byte_intf",
+ "pixel",
+ "core",
+ "iface",
+ "bus";
+
+ phys = <&dsi0_phy>;
+ phy-names = "dsi";
+
+ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
+ assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
+
+ power-domains = <&rpmhpd SC7180_CX>;
+ operating-points-v2 = <&dsi_opp_table>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dpu_intf1_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ endpoint {
+ remote-endpoint = <&sn65dsi86_in>;
+ data-lanes = <0 1 2 3>;
+ qcom,te-source = "mdp_vsync_e";
+ };
+ };
+ };
+ };
...
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-16 08:33:02 +0300