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Diffstat (limited to 'Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml new file mode 100644 index 000000000000..a82c7c7e942b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0+ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-de-clks.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A80 Display Engine Clock Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <mripard@kernel.org> + +properties: + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + + compatible: + const: allwinner,sun9i-a80-de-clks + + reg: + maxItems: 1 + + clocks: + items: + - description: Bus Clock + - description: RAM Bus Clock + - description: Module Clock + + clock-names: + items: + - const: mod + - const: dram + - const: bus + + resets: + maxItems: 1 + +required: + - "#clock-cells" + - "#reset-cells" + - compatible + - reg + - clocks + - clock-names + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/sun9i-a80-ccu.h> + #include <dt-bindings/reset/sun9i-a80-ccu.h> + + de_clocks: clock@3000000 { + compatible = "allwinner,sun9i-a80-de-clks"; + reg = <0x03000000 0x30>; + clocks = <&ccu CLK_DE>, <&ccu CLK_SDRAM>, <&ccu CLK_BUS_DE>; + clock-names = "mod", "dram", "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + +... |