diff options
Diffstat (limited to 'Documentation/devicetree/bindings/arm/freescale')
4 files changed, 80 insertions, 39 deletions
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.txt deleted file mode 100644 index 75195bee116f..000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.txt +++ /dev/null @@ -1,23 +0,0 @@ -Freescale i.MX7ULP Power Management Components ----------------------------------------------- - -The Multi-System Mode Controller (MSMC) is responsible for sequencing -the MCU into and out of all stop and run power modes. Specifically, it -monitors events to trigger transitions between power modes while -controlling the power, clocks, and memories of the MCU to achieve the -power consumption and functionality of that mode. - -The WFI or WFE instruction is used to invoke a Sleep, Deep Sleep or -Standby modes for either Cortex family. Run, Wait, and Stop are the -common terms used for the primary operating modes of Kinetis -microcontrollers. - -Required properties: -- compatible: Should be "fsl,imx7ulp-smc1". -- reg: Specifies base physical address and size of the register sets. - -Example: -smc1: smc1@40410000 { - compatible = "fsl,imx7ulp-smc1"; - reg = <0x40410000 0x1000>; -}; diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml new file mode 100644 index 000000000000..3b26040f8f18 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-pm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX7ULP Power Management Components + +maintainers: + - A.s. Dong <aisheng.dong@nxp.com> + +description: | + The Multi-System Mode Controller (MSMC) is responsible for sequencing + the MCU into and out of all stop and run power modes. Specifically, it + monitors events to trigger transitions between power modes while + controlling the power, clocks, and memories of the MCU to achieve the + power consumption and functionality of that mode. + + The WFI or WFE instruction is used to invoke a Sleep, Deep Sleep or + Standby modes for either Cortex family. Run, Wait, and Stop are the + common terms used for the primary operating modes of Kinetis + microcontrollers. + +properties: + compatible: + const: fsl,imx7ulp-smc1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + smc1@40410000 { + compatible = "fsl,imx7ulp-smc1"; + reg = <0x40410000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt deleted file mode 100644 index 7d0c7f002401..000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt +++ /dev/null @@ -1,16 +0,0 @@ -Freescale i.MX7ULP System Integration Module ----------------------------------------------- -The system integration module (SIM) provides system control and chip configuration -registers. In this module, chip revision information is located in JTAG ID register, -and a set of registers have been made available in DGO domain for SW use, with the -objective to maintain its value between system resets. - -Required properties: -- compatible: Should be "fsl,imx7ulp-sim". -- reg: Specifies base physical address and size of the register sets. - -Example: -sim: sim@410a3000 { - compatible = "fsl,imx7ulp-sim", "syscon"; - reg = <0x410a3000 0x1000>; -}; diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml new file mode 100644 index 000000000000..526f508cb98d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-sim.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX7ULP System Integration Module + +maintainers: + - Anson Huang <anson.huang@nxp.com> + +description: | + The system integration module (SIM) provides system control and chip configuration + registers. In this module, chip revision information is located in JTAG ID register, + and a set of registers have been made available in DGO domain for SW use, with the + objective to maintain its value between system resets. + +properties: + compatible: + items: + - const: fsl,imx7ulp-sim + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + sim@410a3000 { + compatible = "fsl,imx7ulp-sim", "syscon"; + reg = <0x410a3000 0x1000>; + }; |