diff options
| -rw-r--r-- | arch/arm/mach-bcm/Kconfig | 12 | ||||
| -rw-r--r-- | arch/arm/mach-bcm/platsmp-brcmstb.c | 2 | ||||
| -rw-r--r-- | arch/arm/mm/cache-b15-rac.c | 2 |
3 files changed, 14 insertions, 2 deletions
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 8db655c3e321..f73a056bf560 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -218,4 +218,16 @@ config ARCH_BRCMSTB This enables support for Broadcom ARM-based set-top box chipsets, including the 7445 family of chips. +config ARCH_BCMBCA + bool "Broadcom Broadband SoC" + depends on ARCH_MULTI_V7 + select ARM_AMBA + select ARM_GIC + select HAVE_ARM_ARCH_TIMER + help + Say Y if you intend to run the kernel on a Broadcom Broadband ARM-based + BCA chipset. + + This enables support for Broadcom BCA ARM-based broadband chipsets, + including the DSL, PON and Wireless family of chips. endif diff --git a/arch/arm/mach-bcm/platsmp-brcmstb.c b/arch/arm/mach-bcm/platsmp-brcmstb.c index 4555f21e7077..9b457714a41c 100644 --- a/arch/arm/mach-bcm/platsmp-brcmstb.c +++ b/arch/arm/mach-bcm/platsmp-brcmstb.c @@ -59,7 +59,7 @@ static u32 hif_cont_reg; /* * We must quiesce a dying CPU before it can be killed by the boot CPU. Because * one or more cache may be disabled, we must flush to ensure coherency. We - * cannot use traditionl completion structures or spinlocks as they rely on + * cannot use traditional completion structures or spinlocks as they rely on * coherency. */ static DEFINE_PER_CPU_ALIGNED(int, per_cpu_sw_state); diff --git a/arch/arm/mm/cache-b15-rac.c b/arch/arm/mm/cache-b15-rac.c index bdc07030997b..9c1172f26885 100644 --- a/arch/arm/mm/cache-b15-rac.c +++ b/arch/arm/mm/cache-b15-rac.c @@ -74,7 +74,7 @@ static inline void __b15_rac_flush(void) __raw_writel(FLUSH_RAC, b15_rac_base + rac_flush_offset); do { /* This dmb() is required to force the Bus Interface Unit - * to clean oustanding writes, and forces an idle cycle + * to clean outstanding writes, and forces an idle cycle * to be inserted. */ dmb(); |