diff options
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 2 |
2 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c index 0c18b07cae3b..a30fac3d5760 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c @@ -2493,7 +2493,7 @@ static int gfx_v12_1_cp_resume(struct amdgpu_device *adev) static int gfx_v12_1_gfxhub_enable(struct amdgpu_device *adev) { - int r; + int r, i; bool value; r = adev->gfxhub.funcs->gart_enable(adev); @@ -2506,7 +2506,10 @@ static int gfx_v12_1_gfxhub_enable(struct amdgpu_device *adev) adev->gfxhub.funcs->set_fault_enable_default(adev, value); /* TODO investigate why TLB flush is needed, * are we missing a flush somewhere else? */ - adev->gmc.gmc_funcs->flush_gpu_tlb(adev, 0, AMDGPU_GFXHUB(0), 0); + for_each_set_bit(i, adev->vmhubs_mask, AMDGPU_MAX_VMHUBS) { + if (AMDGPU_IS_GFXHUB(i)) + adev->gmc.gmc_funcs->flush_gpu_tlb(adev, 0, AMDGPU_GFXHUB(i), 0); + } return 0; } diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c index 90c5159a5a85..e63ad5f18a8e 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c @@ -974,7 +974,7 @@ static int gmc_v12_0_gart_enable(struct amdgpu_device *adev) value = amdgpu_vm_fault_stop != AMDGPU_VM_FAULT_STOP_ALWAYS; adev->mmhub.funcs->set_fault_enable_default(adev, value); - gmc_v12_0_flush_gpu_tlb(adev, 0, AMDGPU_MMHUB0(0), 0); + adev->gmc.gmc_funcs->flush_gpu_tlb(adev, 0, AMDGPU_MMHUB0(0), 0); dev_info(adev->dev, "PCIE GART of %uM enabled (table at 0x%016llX).\n", (unsigned)(adev->gmc.gart_size >> 20), |