diff options
4 files changed, 0 insertions, 3907 deletions
diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index 4f09d0c431da..30b3168c4358 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -165,15 +165,12 @@ obj-byt = \ pci/css_2400_system/hive/ia_css_isp_configs.o \ pci/css_2400_system/hive/ia_css_isp_params.o \ pci/css_2400_system/hive/ia_css_isp_states.o \ - pci/css_2400_system/spmem_dump.o \ # These will be needed when clean merge CHT support nicely into the driver # Keep them here handy for when we get to that point # obj-cht = \ - pci/css_2401_system/spmem_dump.o \ - pci/css_2401_system/spmem_dump.o \ pci/css_2401_system/hive/ia_css_isp_configs.o \ pci/css_2401_system/hive/ia_css_isp_params.o \ pci/css_2401_system/hive/ia_css_isp_states.o \ diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c deleted file mode 100644 index 300347dbba2b..000000000000 --- a/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c +++ /dev/null @@ -1,1935 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _sp_map_h_ -#define _sp_map_h_ - -#ifndef _hrt_dummy_use_blob_sp -#define _hrt_dummy_use_blob_sp() -#endif - -#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) - -/* function input_system_acquisition_stop: ADE */ - -/* function longjmp: 684E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SRST_MASK -#define HIVE_MEM_HIVE_IF_SRST_MASK scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SRST_MASK 0x1C8 -#define HIVE_SIZE_HIVE_IF_SRST_MASK 16 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SRST_MASK scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SRST_MASK 0x1C8 -#define HIVE_SIZE_sp_HIVE_IF_SRST_MASK 16 - -/* function tmpmem_init_dmem: 6580 */ - -/* function ia_css_isys_sp_token_map_receive_ack: 5EC4 */ - -/* function ia_css_dmaproxy_sp_set_addr_B: 332C */ - -/* function debug_buffer_set_ddr_addr: DD */ - -/* function receiver_port_reg_load: AC2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_mipi -#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_mipi 0x631C -#define HIVE_SIZE_vbuf_mipi 12 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_mipi 0x631C -#define HIVE_SIZE_sp_vbuf_mipi 12 - -/* function ia_css_event_sp_decode: 351D */ - -/* function ia_css_queue_get_size: 48A5 */ - -/* function ia_css_queue_load: 4EE6 */ - -/* function setjmp: 6857 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue -#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x4684 -#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x4684 -#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 - -/* function ia_css_dmaproxy_sp_wait_for_ack: 6E07 */ - -/* function ia_css_sp_rawcopy_func: 510B */ - -/* function ia_css_tagger_buf_sp_pop_marked: 29F7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stage -#define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stage 0x5C00 -#define HIVE_SIZE_isp_stage 832 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stage 0x5C00 -#define HIVE_SIZE_sp_isp_stage 832 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_raw -#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_raw 0x2F4 -#define HIVE_SIZE_vbuf_raw 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_raw 0x2F4 -#define HIVE_SIZE_sp_vbuf_raw 4 - -/* function ia_css_sp_bin_copy_func: 5032 */ - -/* function ia_css_queue_item_store: 4C34 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 - -/* function sp_start_isp: 45D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_binary_group -#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_binary_group 0x5FF0 -#define HIVE_SIZE_sp_binary_group 32 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_binary_group 0x5FF0 -#define HIVE_SIZE_sp_sp_binary_group 32 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sw_state -#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sw_state 0x62AC -#define HIVE_SIZE_sp_sw_state 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sw_state 0x62AC -#define HIVE_SIZE_sp_sp_sw_state 4 - -/* function ia_css_thread_sp_main: D5B */ - -/* function ia_css_ispctrl_sp_init_internal_buffers: 3723 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_psys_event_queue_handle -#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4B54 -#define HIVE_SIZE_sp2host_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4B54 -#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue -#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x4698 -#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x4698 -#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 - -/* function ia_css_tagger_sp_propagate_frame: 2410 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_stop_copy_preview -#define HIVE_MEM_sp_stop_copy_preview scalar_processor_2400_dmem -#define HIVE_ADDR_sp_stop_copy_preview 0x6290 -#define HIVE_SIZE_sp_stop_copy_preview 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_stop_copy_preview scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_stop_copy_preview 0x6290 -#define HIVE_SIZE_sp_sp_stop_copy_preview 4 - -/* function input_system_reg_load: B17 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_handles -#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_handles 0x6328 -#define HIVE_SIZE_vbuf_handles 960 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_handles 0x6328 -#define HIVE_SIZE_sp_vbuf_handles 960 - -/* function ia_css_queue_store: 4D9A */ - -/* function ia_css_sp_flash_register: 2C2C */ - -/* function ia_css_sp_rawcopy_dummy_function: 5652 */ - -/* function ia_css_isys_sp_backend_create: 5B37 */ - -/* function ia_css_pipeline_sp_init: 1833 */ - -/* function ia_css_tagger_sp_configure: 2300 */ - -/* function ia_css_ispctrl_sp_end_binary: 3566 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 - -/* function receiver_port_reg_store: AC9 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_is_pending_mask -#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_is_pending_mask 0x5C -#define HIVE_SIZE_event_is_pending_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_is_pending_mask 0x5C -#define HIVE_SIZE_sp_event_is_pending_mask 44 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_frame -#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_frame 0x46AC -#define HIVE_SIZE_sp_all_cb_elems_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46AC -#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_isys_event_queue_handle -#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4B74 -#define HIVE_SIZE_sp2host_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4B74 -#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_com -#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_com 0x4114 -#define HIVE_SIZE_host_sp_com 220 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_com 0x4114 -#define HIVE_SIZE_sp_host_sp_com 220 - -/* function ia_css_queue_get_free_space: 49F9 */ - -/* function exec_image_pipe: 6C4 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_init_dmem_data -#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_init_dmem_data 0x62B0 -#define HIVE_SIZE_sp_init_dmem_data 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_init_dmem_data 0x62B0 -#define HIVE_SIZE_sp_sp_init_dmem_data 24 - -/* function ia_css_sp_metadata_start: 5914 */ - -/* function ia_css_bufq_sp_init_buffer_queues: 2C9B */ - -/* function ia_css_pipeline_sp_stop: 1816 */ - -/* function ia_css_tagger_sp_connect_pipes: 27EA */ - -/* function sp_isys_copy_wait: 70D */ - -/* function is_isp_debug_buffer_full: 337 */ - -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 32AF */ - -/* function encode_and_post_timer_event: A30 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_per_frame_data -#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_per_frame_data 0x41F0 -#define HIVE_SIZE_sp_per_frame_data 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_per_frame_data 0x41F0 -#define HIVE_SIZE_sp_sp_per_frame_data 4 - -/* function ia_css_rmgr_sp_vbuf_dequeue: 62D4 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_psys_event_queue_handle -#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4B80 -#define HIVE_SIZE_host2sp_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4B80 -#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_xmem_bin_addr -#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_xmem_bin_addr 0x41F4 -#define HIVE_SIZE_xmem_bin_addr 4 -#else -#endif -#endif -#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_sp_xmem_bin_addr 0x41F4 -#define HIVE_SIZE_sp_xmem_bin_addr 4 - -/* function tmr_clock_init: 65A0 */ - -/* function ia_css_pipeline_sp_run: 1403 */ - -/* function memcpy: 68F7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GP_DEVICE_BASE -#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GP_DEVICE_BASE 0x2FC -#define HIVE_SIZE_GP_DEVICE_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x2FC -#define HIVE_SIZE_sp_GP_DEVICE_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue -#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E0 -#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E0 -#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 - -/* function input_system_reg_store: B1E */ - -/* function ia_css_isys_sp_frontend_start: 5D4D */ - -/* function ia_css_uds_sp_scale_params: 6600 */ - -/* function ia_css_circbuf_increase_size: E40 */ - -/* function __divu: 6875 */ - -/* function ia_css_thread_sp_get_state: C83 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_stop -#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_stop 0x46BC -#define HIVE_SIZE_sem_for_cont_capt_stop 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x46BC -#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 - -/* function thread_fiber_sp_main: E39 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_pipe_thread -#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pipe_thread 0x4800 -#define HIVE_SIZE_sp_isp_pipe_thread 340 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4800 -#define HIVE_SIZE_sp_sp_isp_pipe_thread 340 - -/* function ia_css_parambuf_sp_handle_parameter_sets: 128A */ - -/* function ia_css_spctrl_sp_set_state: 5943 */ - -/* function ia_css_thread_sem_sp_signal: 6AF7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_IRQ_BASE -#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_IRQ_BASE 0x2C -#define HIVE_SIZE_IRQ_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_IRQ_BASE 0x2C -#define HIVE_SIZE_sp_IRQ_BASE 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_TIMED_CTRL_BASE -#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_TIMED_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 - -/* function ia_css_isys_sp_isr: 6FDC */ - -/* function ia_css_isys_sp_generate_exp_id: 60E5 */ - -/* function ia_css_rmgr_sp_init: 61CF */ - -/* function ia_css_thread_sem_sp_init: 6BC8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_is_isp_requested -#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x308 -#define HIVE_SIZE_is_isp_requested 4 -#else -#endif -#endif -#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x308 -#define HIVE_SIZE_sp_is_isp_requested 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_frame -#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_frame 0x46D0 -#define HIVE_SIZE_sem_for_reading_cb_frame 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x46D0 -#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 - -/* function ia_css_dmaproxy_sp_execute: 3217 */ - -/* function ia_css_queue_is_empty: 48E0 */ - -/* function ia_css_pipeline_sp_has_stopped: 180C */ - -/* function ia_css_circbuf_extract: F44 */ - -/* function ia_css_tagger_buf_sp_is_locked_from_start: 2B0D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_sp_thread -#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_current_sp_thread 0x1DC -#define HIVE_SIZE_current_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_sp_thread 0x1DC -#define HIVE_SIZE_sp_current_sp_thread 4 - -/* function ia_css_spctrl_sp_get_spid: 594A */ - -/* function ia_css_bufq_sp_reset_buffers: 2D22 */ - -/* function ia_css_dmaproxy_sp_read_byte_addr: 6E35 */ - -/* function ia_css_rmgr_sp_uninit: 61C8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack -#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_threads_stack 28 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_sp_threads_stack 28 - -/* function ia_css_circbuf_peek: F26 */ - -/* function ia_css_parambuf_sp_wait_for_in_param: 1053 */ - -/* function ia_css_isys_sp_token_map_get_exp_id: 5FAD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_param -#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_param 0x46F8 -#define HIVE_SIZE_sp_all_cb_elems_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x46F8 -#define HIVE_SIZE_sp_sp_all_cb_elems_param 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_pipeline_sp_curr_binary_id -#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1EC -#define HIVE_SIZE_pipeline_sp_curr_binary_id 4 -#else -#endif -#endif -#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1EC -#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame_desc -#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4708 -#define HIVE_SIZE_sp_all_cbs_frame_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4708 -#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 - -/* function sp_isys_copy_func_v2: 706 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_param -#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_param 0x4710 -#define HIVE_SIZE_sem_for_reading_cb_param 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4710 -#define HIVE_SIZE_sp_sem_for_reading_cb_param 40 - -/* function ia_css_queue_get_used_space: 49AD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_start -#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_start 0x4738 -#define HIVE_SIZE_sem_for_cont_capt_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4738 -#define HIVE_SIZE_sp_sem_for_cont_capt_start 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tmp_heap -#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_tmp_heap 0x6010 -#define HIVE_SIZE_tmp_heap 640 -#else -#endif -#endif -#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tmp_heap 0x6010 -#define HIVE_SIZE_sp_tmp_heap 640 - -/* function ia_css_rmgr_sp_get_num_vbuf: 64D8 */ - -/* function ia_css_ispctrl_sp_output_compute_dma_info: 3F49 */ - -/* function ia_css_tagger_sp_lock_exp_id: 20CD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 - -/* function ia_css_queue_is_full: 4A44 */ - -/* function debug_buffer_init_isp: E4 */ - -/* function ia_css_isys_sp_frontend_uninit: 5D07 */ - -/* function ia_css_tagger_sp_exp_id_is_locked: 2003 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem -#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 -#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 -#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 - -/* function ia_css_rmgr_sp_refcount_dump: 62AF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_pipe_threads -#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_pipe_threads 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_sp_pipe_threads 20 - -/* function sp_event_proxy_func: 71B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_isys_event_queue_handle -#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4BDC -#define HIVE_SIZE_host2sp_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4BDC -#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 - -/* function ia_css_thread_sp_yield: 6A70 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param_desc -#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param_desc 0x474C -#define HIVE_SIZE_sp_all_cbs_param_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x474C -#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb -#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 -#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 -#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 - -/* function ia_css_thread_sp_fork: D10 */ - -/* function ia_css_tagger_sp_destroy: 27F4 */ - -/* function ia_css_dmaproxy_sp_vmem_read: 31B7 */ - -/* function ia_css_ifmtr_sp_init: 6136 */ - -/* function initialize_sp_group: 6D4 */ - -/* function ia_css_tagger_buf_sp_peek: 2919 */ - -/* function ia_css_thread_sp_init: D3C */ - -/* function ia_css_isys_sp_reset_exp_id: 60DD */ - -/* function qos_scheduler_update_fps: 65F0 */ - -/* function ia_css_ispctrl_sp_set_stream_base_addr: 461E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_DMEM_BASE -#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_ISP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_sp_ISP_DMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_DMEM_BASE -#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_SP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_sp_SP_DMEM_BASE 4 - -/* function ia_css_dmaproxy_sp_read: 322D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_raw_copy_line_count -#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_raw_copy_line_count 0x2C8 -#define HIVE_SIZE_raw_copy_line_count 4 -#else -#endif -#endif -#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_sp_raw_copy_line_count 0x2C8 -#define HIVE_SIZE_sp_raw_copy_line_count 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle -#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4BE8 -#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4BE8 -#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 - -/* function ia_css_queue_peek: 4923 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt -#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4A94 -#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4A94 -#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_can_send_token_mask -#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_can_send_token_mask 0x88 -#define HIVE_SIZE_event_can_send_token_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_can_send_token_mask 0x88 -#define HIVE_SIZE_sp_event_can_send_token_mask 44 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_thread -#define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_isp_thread 0x5F40 -#define HIVE_SIZE_isp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_thread 0x5F40 -#define HIVE_SIZE_sp_isp_thread 4 - -/* function encode_and_post_sp_event_non_blocking: A78 */ - -/* function ia_css_isys_sp_frontend_destroy: 5DDF */ - -/* function is_ddr_debug_buffer_full: 2CC */ - -/* function ia_css_isys_sp_frontend_stop: 5D1F */ - -/* function ia_css_isys_sp_token_map_init: 607B */ - -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2969 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_fiber -#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_fiber 0x19C -#define HIVE_SIZE_sp_threads_fiber 28 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_fiber 0x19C -#define HIVE_SIZE_sp_sp_threads_fiber 28 - -/* function encode_and_post_sp_event: A01 */ - -/* function debug_enqueue_ddr: EE */ - -/* function ia_css_rmgr_sp_refcount_init_vbuf: 626A */ - -/* function dmaproxy_sp_read_write: 6EE4 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer -#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 -#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 -#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_buffer_queue_handle -#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4BF4 -#define HIVE_SIZE_host2sp_buffer_queue_handle 480 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4BF4 -#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_service -#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3178 -#define HIVE_SIZE_ia_css_flash_sp_in_service 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3178 -#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 - -/* function ia_css_dmaproxy_sp_process: 6BF0 */ - -/* function ia_css_tagger_buf_sp_mark_from_end: 2BF1 */ - -/* function ia_css_isys_sp_backend_rcv_acquire_ack: 59EC */ - -/* function ia_css_isys_sp_backend_pre_acquire_request: 5A02 */ - -/* function ia_css_ispctrl_sp_init_cs: 3653 */ - -/* function ia_css_spctrl_sp_init: 5958 */ - -/* function sp_event_proxy_init: 730 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_output -#define HIVE_MEM_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_output 0x41F8 -#define HIVE_SIZE_sp_output 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_output 0x41F8 -#define HIVE_SIZE_sp_sp_output 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_CTRL_BASE -#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_ISP_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_sp_ISP_CTRL_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_INPUT_FORMATTER_BASE -#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_INPUT_FORMATTER_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 - -/* function sp_dma_proxy_reset_channels: 3487 */ - -/* function ia_css_isys_sp_backend_acquire: 5B0D */ - -/* function ia_css_tagger_sp_update_size: 28E8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue -#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x511C -#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x511C -#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 - -/* function thread_fiber_sp_create: DA8 */ - -/* function ia_css_dmaproxy_sp_set_increments: 3319 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_frame -#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_frame 0x4754 -#define HIVE_SIZE_sem_for_writing_cb_frame 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x4754 -#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 - -/* function receiver_reg_store: AD7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_param -#define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_param 0x4768 -#define HIVE_SIZE_sem_for_writing_cb_param 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x4768 -#define HIVE_SIZE_sp_sem_for_writing_cb_param 20 - -/* function sp_start_isp_entry: 453 */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifdef HIVE_ADDR_sp_start_isp_entry -#endif -#define HIVE_ADDR_sp_start_isp_entry 0x453 -#endif -#define HIVE_ADDR_sp_sp_start_isp_entry 0x453 - -/* function ia_css_tagger_buf_sp_unmark_all: 2B75 */ - -/* function ia_css_tagger_buf_sp_unmark_from_start: 2BB6 */ - -/* function ia_css_dmaproxy_sp_channel_acquire: 34B3 */ - -/* function ia_css_rmgr_sp_add_num_vbuf: 64B4 */ - -/* function ia_css_isys_sp_token_map_create: 60C4 */ - -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3183 */ - -/* function ia_css_tagger_sp_acquire_buf_elem: 1FDB */ - -/* function ia_css_bufq_sp_is_dynamic_buffer: 306C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_group -#define HIVE_MEM_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_group 0x4208 -#define HIVE_SIZE_sp_group 1144 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_group 0x4208 -#define HIVE_SIZE_sp_sp_group 1144 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_event_proxy_thread -#define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_proxy_thread 0x4954 -#define HIVE_SIZE_sp_event_proxy_thread 68 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x4954 -#define HIVE_SIZE_sp_sp_event_proxy_thread 68 - -/* function ia_css_thread_sp_kill: CD6 */ - -/* function ia_css_tagger_sp_create: 28A2 */ - -/* function tmpmem_acquire_dmem: 6561 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_MMU_BASE -#define HIVE_MEM_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_MMU_BASE 0x24 -#define HIVE_SIZE_MMU_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_MMU_BASE 0x24 -#define HIVE_SIZE_sp_MMU_BASE 8 - -/* function ia_css_dmaproxy_sp_channel_release: 349F */ - -/* function ia_css_dmaproxy_sp_is_idle: 347F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_qos_start -#define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_qos_start 0x477C -#define HIVE_SIZE_sem_for_qos_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_qos_start 0x477C -#define HIVE_SIZE_sp_sem_for_qos_start 20 - -/* function isp_hmem_load: B55 */ - -/* function ia_css_tagger_sp_release_buf_elem: 1FB7 */ - -/* function ia_css_eventq_sp_send: 34F5 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_isys_sp_error_cnt -#define HIVE_MEM_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x62D4 -#define HIVE_SIZE_ia_css_isys_sp_error_cnt 16 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x62D4 -#define HIVE_SIZE_sp_ia_css_isys_sp_error_cnt 16 - -/* function ia_css_tagger_buf_sp_unlock_from_start: 2AA5 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_debug_buffer_ddr_address -#define HIVE_MEM_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_debug_buffer_ddr_address 4 -#else -#endif -#endif -#define HIVE_MEM_sp_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_sp_debug_buffer_ddr_address 4 - -/* function sp_isys_copy_request: 714 */ - -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 6344 */ - -/* function ia_css_thread_sp_set_priority: CCE */ - -/* function sizeof_hmem: BFC */ - -/* function tmpmem_release_dmem: 6550 */ - -/* function cnd_input_system_cfg: 392 */ - -/* function __ia_css_sp_rawcopy_func_critical: 6F65 */ - -/* function ia_css_dmaproxy_sp_set_width_exception: 3304 */ - -/* function sp_event_assert: 8B1 */ - -/* function ia_css_flash_sp_init_internal_params: 2C90 */ - -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 29AB */ - -/* function __modu: 68BB */ - -/* function ia_css_dmaproxy_sp_init_isp_vector: 3189 */ - -/* function isp_vamem_store: 0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GDC_BASE -#define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GDC_BASE 0x44 -#define HIVE_SIZE_GDC_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GDC_BASE 0x44 -#define HIVE_SIZE_sp_GDC_BASE 8 - -/* function ia_css_queue_local_init: 4C0E */ - -/* function sp_event_proxy_callout_func: 6988 */ - -/* function qos_scheduler_schedule_stage: 65C1 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads -#define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x49E0 -#define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x49E0 -#define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack_size -#define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack_size 0x180 -#define HIVE_SIZE_sp_threads_stack_size 28 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack_size 0x180 -#define HIVE_SIZE_sp_sp_threads_stack_size 28 - -/* function ia_css_ispctrl_sp_isp_done_row_striping: 3F2F */ - -/* function __ia_css_isys_sp_isr_text: 5E09 */ - -/* function ia_css_queue_dequeue: 4A8C */ - -/* function ia_css_dmaproxy_sp_configure_channel: 6E4C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_thread_fiber_sp -#define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_current_thread_fiber_sp 0x49E8 -#define HIVE_SIZE_current_thread_fiber_sp 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x49E8 -#define HIVE_SIZE_sp_current_thread_fiber_sp 4 - -/* function ia_css_circbuf_pop: FD8 */ - -/* function memset: 693A */ - -/* function irq_raise_set_token: B6 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GPIO_BASE -#define HIVE_MEM_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GPIO_BASE 0x3C -#define HIVE_SIZE_GPIO_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GPIO_BASE 0x3C -#define HIVE_SIZE_sp_GPIO_BASE 4 - -/* function ia_css_pipeline_acc_stage_enable: 17D7 */ - -/* function ia_css_tagger_sp_unlock_exp_id: 2028 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_ph -#define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_isp_ph 0x62E4 -#define HIVE_SIZE_isp_ph 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_ph 0x62E4 -#define HIVE_SIZE_sp_isp_ph 28 - -/* function ia_css_isys_sp_token_map_flush: 6009 */ - -/* function ia_css_ispctrl_sp_init_ds: 37B2 */ - -/* function get_xmem_base_addr_raw: 3B5F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param -#define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param 0x4790 -#define HIVE_SIZE_sp_all_cbs_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param 0x4790 -#define HIVE_SIZE_sp_sp_all_cbs_param 16 - -/* function ia_css_circbuf_create: 1026 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp_group -#define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp_group 0x47A0 -#define HIVE_SIZE_sem_for_sp_group 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp_group 0x47A0 -#define HIVE_SIZE_sp_sem_for_sp_group 20 - -/* function ia_css_framebuf_sp_wait_for_in_frame: 64DF */ - -/* function ia_css_sp_rawcopy_tag_frame: 556F */ - -/* function isp_hmem_clear: B25 */ - -/* function ia_css_framebuf_sp_release_in_frame: 6522 */ - -/* function ia_css_isys_sp_backend_snd_acquire_request: 5A5F */ - -/* function ia_css_isys_sp_token_map_is_full: 5E90 */ - -/* function input_system_acquisition_run: AF9 */ - -/* function ia_css_ispctrl_sp_start_binary: 3631 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 - -/* function ia_css_eventq_sp_recv: 34C7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_pool -#define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_isp_pool 0x2E8 -#define HIVE_SIZE_isp_pool 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pool 0x2E8 -#define HIVE_SIZE_sp_isp_pool 4 - -/* function ia_css_rmgr_sp_rel_gen: 6211 */ - -/* function css_get_frame_processing_time_end: 1FA7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_any_pending_mask -#define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_any_pending_mask 0x300 -#define HIVE_SIZE_event_any_pending_mask 8 -#else -#endif -#endif -#define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_any_pending_mask 0x300 -#define HIVE_SIZE_sp_event_any_pending_mask 8 - -/* function ia_css_isys_sp_backend_push: 5A16 */ - -/* function sh_css_decode_tag_descr: 352 */ - -/* function debug_enqueue_isp: 27B */ - -/* function qos_scheduler_update_stage_budget: 65AF */ - -/* function ia_css_spctrl_sp_uninit: 5951 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SWITCH_CODE -#define HIVE_MEM_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SWITCH_CODE 0x1D8 -#define HIVE_SIZE_HIVE_IF_SWITCH_CODE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SWITCH_CODE 0x1D8 -#define HIVE_SIZE_sp_HIVE_IF_SWITCH_CODE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 - -/* function ia_css_tagger_buf_sp_lock_from_start: 2AD9 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_isp_idle -#define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_isp_idle 0x47B4 -#define HIVE_SIZE_sem_for_isp_idle 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_isp_idle 0x47B4 -#define HIVE_SIZE_sp_sem_for_isp_idle 20 - -/* function ia_css_dmaproxy_sp_write_byte_addr: 31E6 */ - -/* function ia_css_dmaproxy_sp_init: 315D */ - -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2D62 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_VAMEM_BASE -#define HIVE_MEM_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_ISP_VAMEM_BASE 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger -#define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x6294 -#define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x6294 -#define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 - -/* function ia_css_queue_item_load: 4D00 */ - -/* function ia_css_spctrl_sp_get_state: 593C */ - -/* function ia_css_isys_sp_token_map_uninit: 6026 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_callout_sp_thread -#define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_callout_sp_thread 0x49DC -#define HIVE_SIZE_callout_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_callout_sp_thread 0x49DC -#define HIVE_SIZE_sp_callout_sp_thread 4 - -/* function thread_fiber_sp_init: E2F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_PMEM_BASE -#define HIVE_MEM_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_SP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_sp_SP_PMEM_BASE 4 - -/* function ia_css_isys_sp_token_map_snd_acquire_req: 5F96 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_input_stream_format -#define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_input_stream_format 0x40F8 -#define HIVE_SIZE_sp_isp_input_stream_format 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x40F8 -#define HIVE_SIZE_sp_sp_isp_input_stream_format 20 - -/* function __mod: 68A7 */ - -/* function ia_css_dmaproxy_sp_init_dmem_channel: 3247 */ - -/* function ia_css_thread_sp_join: CFF */ - -/* function ia_css_dmaproxy_sp_add_command: 6F4F */ - -/* function ia_css_sp_metadata_thread_func: 57F0 */ - -/* function __sp_event_proxy_func_critical: 6975 */ - -/* function ia_css_sp_metadata_wait: 5903 */ - -/* function ia_css_circbuf_peek_from_start: F08 */ - -/* function ia_css_event_sp_encode: 3552 */ - -/* function ia_css_thread_sp_run: D72 */ - -/* function sp_isys_copy_func: 6F6 */ - -/* function ia_css_isys_sp_backend_flush: 5A7F */ - -/* function ia_css_isys_sp_backend_frame_exists: 599B */ - -/* function ia_css_sp_isp_param_init_isp_memories: 4789 */ - -/* function register_isr: 8A9 */ - -/* function irq_raise: C8 */ - -/* function ia_css_dmaproxy_sp_mmu_invalidate: 3124 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SRST_ADDRESS -#define HIVE_MEM_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SRST_ADDRESS 0x1B8 -#define HIVE_SIZE_HIVE_IF_SRST_ADDRESS 16 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SRST_ADDRESS 0x1B8 -#define HIVE_SIZE_sp_HIVE_IF_SRST_ADDRESS 16 - -/* function pipeline_sp_initialize_stage: 190B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_isys_sp_frontend_states -#define HIVE_MEM_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x62C8 -#define HIVE_SIZE_ia_css_isys_sp_frontend_states 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x62C8 -#define HIVE_SIZE_sp_ia_css_isys_sp_frontend_states 12 - -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6E1E */ - -/* function ia_css_ispctrl_sp_done_ds: 3799 */ - -/* function ia_css_sp_isp_param_get_mem_inits: 4764 */ - -/* function ia_css_parambuf_sp_init_buffer_queues: 13D0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_pfp_spref -#define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_pfp_spref 0x2F0 -#define HIVE_SIZE_vbuf_pfp_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x2F0 -#define HIVE_SIZE_sp_vbuf_pfp_spref 4 - -/* function input_system_cfg: ABB */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_HMEM_BASE -#define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_ISP_HMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_sp_ISP_HMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x59DC -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x59DC -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 - -/* function qos_scheduler_init_stage_budget: 65E8 */ - -/* function ia_css_isys_sp_backend_release: 5AF4 */ - -/* function ia_css_isys_sp_backend_destroy: 5B1E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_buffer_queue_handle -#define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x5AF4 -#define HIVE_SIZE_sp2host_buffer_queue_handle 96 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5AF4 -#define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 - -/* function ia_css_isys_sp_token_map_check_mipi_frame_size: 5F5A */ - -/* function ia_css_ispctrl_sp_init_isp_vars: 4483 */ - -/* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5B70 */ - -/* function sp_warning: 8DC */ - -/* function ia_css_rmgr_sp_vbuf_enqueue: 6304 */ - -/* function ia_css_tagger_sp_tag_exp_id: 2142 */ - -/* function ia_css_dmaproxy_sp_write: 31FD */ - -/* function ia_css_parambuf_sp_release_in_param: 1250 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_irq_sw_interrupt_token -#define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_irq_sw_interrupt_token 0x40F4 -#define HIVE_SIZE_irq_sw_interrupt_token 4 -#else -#endif -#endif -#define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x40F4 -#define HIVE_SIZE_sp_irq_sw_interrupt_token 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_addresses -#define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_addresses 0x5F44 -#define HIVE_SIZE_sp_isp_addresses 172 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_addresses 0x5F44 -#define HIVE_SIZE_sp_sp_isp_addresses 172 - -/* function ia_css_rmgr_sp_acq_gen: 6229 */ - -/* function receiver_reg_load: AD0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isps -#define HIVE_MEM_isps scalar_processor_2400_dmem -#define HIVE_ADDR_isps 0x6300 -#define HIVE_SIZE_isps 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isps 0x6300 -#define HIVE_SIZE_sp_isps 28 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_queues_initialized -#define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_queues_initialized 0x410C -#define HIVE_SIZE_host_sp_queues_initialized 4 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x410C -#define HIVE_SIZE_sp_host_sp_queues_initialized 4 - -/* function ia_css_queue_uninit: 4BCC */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started -#define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5BFC -#define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5BFC -#define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 - -/* function ia_css_bufq_sp_release_dynamic_buf: 2DCE */ - -/* function ia_css_dmaproxy_sp_set_height_exception: 32F5 */ - -/* function ia_css_dmaproxy_sp_init_vmem_channel: 327A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_num_ready_threads -#define HIVE_MEM_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_num_ready_threads 0x49E4 -#define HIVE_SIZE_num_ready_threads 4 -#else -#endif -#endif -#define HIVE_MEM_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_num_ready_threads 0x49E4 -#define HIVE_SIZE_sp_num_ready_threads 4 - -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 31CF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_spref -#define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_spref 0x2EC -#define HIVE_SIZE_vbuf_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_spref 0x2EC -#define HIVE_SIZE_sp_vbuf_spref 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_metadata_thread -#define HIVE_MEM_sp_metadata_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_metadata_thread 0x4998 -#define HIVE_SIZE_sp_metadata_thread 68 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_metadata_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_metadata_thread 0x4998 -#define HIVE_SIZE_sp_sp_metadata_thread 68 - -/* function ia_css_queue_enqueue: 4B16 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_request -#define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_request 0x4A98 -#define HIVE_SIZE_ia_css_flash_sp_request 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4A98 -#define HIVE_SIZE_sp_ia_css_flash_sp_request 4 - -/* function ia_css_dmaproxy_sp_vmem_write: 31A0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tagger_frames -#define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_tagger_frames 0x49EC -#define HIVE_SIZE_tagger_frames 168 -#else -#endif -#endif -#define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tagger_frames 0x49EC -#define HIVE_SIZE_sp_tagger_frames 168 - -/* function ia_css_isys_sp_token_map_snd_capture_req: 5FB8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_if -#define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_if 0x47C8 -#define HIVE_SIZE_sem_for_reading_if 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_if 0x47C8 -#define HIVE_SIZE_sp_sem_for_reading_if 20 - -/* function sp_generate_interrupts: 95B */ - -/* function ia_css_pipeline_sp_start: 181E */ - -/* function ia_css_sp_rawcopy_init: 50F3 */ - -/* function tmr_clock_read: 6596 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_BAMEM_BASE -#define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_BAMEM_BASE 0x2F8 -#define HIVE_SIZE_ISP_BAMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x2F8 -#define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 - -/* function ia_css_isys_sp_frontend_rcv_capture_ack: 5C1F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 - -/* function css_get_frame_processing_time_start: 1FAF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame -#define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame 0x47DC -#define HIVE_SIZE_sp_all_cbs_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x47DC -#define HIVE_SIZE_sp_sp_all_cbs_frame 16 - -/* function thread_sp_queue_print: D8F */ - -/* function sp_notify_eof: 907 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_str2mem -#define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_str2mem 0x47EC -#define HIVE_SIZE_sem_for_str2mem 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_str2mem 0x47EC -#define HIVE_SIZE_sp_sem_for_str2mem 20 - -/* function ia_css_tagger_buf_sp_is_marked_from_start: 2B41 */ - -/* function ia_css_bufq_sp_acquire_dynamic_buf: 2F86 */ - -/* function ia_css_circbuf_destroy: 101D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_PMEM_BASE -#define HIVE_MEM_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_ISP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_sp_ISP_PMEM_BASE 4 - -/* function ia_css_sp_isp_param_mem_load: 46F7 */ - -/* function ia_css_tagger_buf_sp_pop_from_start: 292D */ - -/* function __div: 685F */ - -/* function ia_css_isys_sp_frontend_create: 5DF0 */ - -/* function ia_css_rmgr_sp_refcount_release_vbuf: 6323 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_use -#define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x4A9C -#define HIVE_SIZE_ia_css_flash_sp_in_use 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4A9C -#define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 - -/* function ia_css_thread_sem_sp_wait: 6B42 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sleep_mode -#define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sleep_mode 0x4110 -#define HIVE_SIZE_sp_sleep_mode 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sleep_mode 0x4110 -#define HIVE_SIZE_sp_sp_sleep_mode 4 - -/* function ia_css_tagger_buf_sp_push: 2A3C */ - -/* function mmu_invalidate_cache: D3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_max_cb_elems -#define HIVE_MEM_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_max_cb_elems 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_sp_max_cb_elems 8 - -/* function ia_css_queue_remote_init: 4BEE */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stop_req -#define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stop_req 0x4680 -#define HIVE_SIZE_isp_stop_req 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stop_req 0x4680 -#define HIVE_SIZE_sp_isp_stop_req 4 - -#define HIVE_ICACHE_sp_critical_SEGMENT_START 0 -#define HIVE_ICACHE_sp_critical_NUM_SEGMENTS 1 - -#endif /* _sp_map_h_ */ -extern void sh_css_dump_sp_dmem(void); -void sh_css_dump_sp_dmem(void) -{ -} diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c deleted file mode 100644 index 9d96d52e5ecc..000000000000 --- a/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c +++ /dev/null @@ -1,1965 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _sp_map_h_ -#define _sp_map_h_ - -#ifndef _hrt_dummy_use_blob_sp -#define _hrt_dummy_use_blob_sp() -#endif - -#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) - -/* function longjmp: 6A0B */ - -/* function tmpmem_init_dmem: 671E */ - -/* function ia_css_dmaproxy_sp_set_addr_B: 3DC5 */ - -/* function ia_css_pipe_data_init_tagger_resources: AC7 */ - -/* function debug_buffer_set_ddr_addr: DD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_mipi -#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_mipi 0x7444 -#define HIVE_SIZE_vbuf_mipi 12 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_mipi 0x7444 -#define HIVE_SIZE_sp_vbuf_mipi 12 - -/* function ia_css_event_sp_decode: 3FB6 */ - -/* function ia_css_queue_get_size: 53C8 */ - -/* function ia_css_queue_load: 59DF */ - -/* function setjmp: 6A14 */ - -/* function ia_css_pipeline_sp_sfi_get_current_frame: 2790 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue -#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x57FC -#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x57FC -#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 - -/* function ia_css_dmaproxy_sp_wait_for_ack: 6FF7 */ - -/* function ia_css_sp_rawcopy_func: 5B4A */ - -/* function ia_css_tagger_buf_sp_pop_marked: 345C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_CSI_RX_BE_SID_WIDTH -#define HIVE_MEM_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem -#define HIVE_ADDR_N_CSI_RX_BE_SID_WIDTH 0x1D0 -#define HIVE_SIZE_N_CSI_RX_BE_SID_WIDTH 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_CSI_RX_BE_SID_WIDTH 0x1D0 -#define HIVE_SIZE_sp_N_CSI_RX_BE_SID_WIDTH 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stage -#define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stage 0x6D48 -#define HIVE_SIZE_isp_stage 832 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stage 0x6D48 -#define HIVE_SIZE_sp_isp_stage 832 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_raw -#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_raw 0x394 -#define HIVE_SIZE_vbuf_raw 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_raw 0x394 -#define HIVE_SIZE_sp_vbuf_raw 4 - -/* function ia_css_sp_bin_copy_func: 5B2B */ - -/* function ia_css_queue_item_store: 572D */ - -/* function input_system_reset: 1201 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 - -/* function sp_start_isp: 39C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_binary_group -#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_binary_group 0x7138 -#define HIVE_SIZE_sp_binary_group 32 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_binary_group 0x7138 -#define HIVE_SIZE_sp_sp_binary_group 32 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sw_state -#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sw_state 0x73F0 -#define HIVE_SIZE_sp_sw_state 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sw_state 0x73F0 -#define HIVE_SIZE_sp_sp_sw_state 4 - -/* function ia_css_thread_sp_main: 136D */ - -/* function ia_css_ispctrl_sp_init_internal_buffers: 41F7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_psys_event_queue_handle -#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5C98 -#define HIVE_SIZE_sp2host_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5C98 -#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 - -/* function pixelgen_unit_test: E62 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue -#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5810 -#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5810 -#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 - -/* function ia_css_tagger_sp_propagate_frame: 2D23 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_handles -#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_handles 0x7450 -#define HIVE_SIZE_vbuf_handles 960 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_handles 0x7450 -#define HIVE_SIZE_sp_vbuf_handles 960 - -/* function ia_css_queue_store: 5893 */ - -/* function ia_css_sp_flash_register: 3691 */ - -/* function ia_css_pipeline_sp_init: 1FD7 */ - -/* function ia_css_tagger_sp_configure: 2C13 */ - -/* function ia_css_ispctrl_sp_end_binary: 3FFF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 - -/* function pixelgen_tpg_run: F18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_is_pending_mask -#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_is_pending_mask 0x5C -#define HIVE_SIZE_event_is_pending_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_is_pending_mask 0x5C -#define HIVE_SIZE_sp_event_is_pending_mask 44 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_frame -#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_frame 0x5824 -#define HIVE_SIZE_sp_all_cb_elems_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5824 -#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_isys_event_queue_handle -#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5CB8 -#define HIVE_SIZE_sp2host_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5CB8 -#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_com -#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_com 0x3E6C -#define HIVE_SIZE_host_sp_com 220 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_com 0x3E6C -#define HIVE_SIZE_sp_host_sp_com 220 - -/* function ia_css_queue_get_free_space: 54F2 */ - -/* function exec_image_pipe: 57A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_init_dmem_data -#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_init_dmem_data 0x73F4 -#define HIVE_SIZE_sp_init_dmem_data 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_init_dmem_data 0x73F4 -#define HIVE_SIZE_sp_sp_init_dmem_data 24 - -/* function ia_css_sp_metadata_start: 5EB3 */ - -/* function ia_css_bufq_sp_init_buffer_queues: 36E2 */ - -/* function ia_css_pipeline_sp_stop: 1FBA */ - -/* function ia_css_tagger_sp_connect_pipes: 30FD */ - -/* function sp_isys_copy_wait: 5D8 */ - -/* function is_isp_debug_buffer_full: 337 */ - -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3D35 */ - -/* function encode_and_post_timer_event: A3C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_input_system_bz2788_active -#define HIVE_MEM_input_system_bz2788_active scalar_processor_2400_dmem -#define HIVE_ADDR_input_system_bz2788_active 0x2524 -#define HIVE_SIZE_input_system_bz2788_active 4 -#else -#endif -#endif -#define HIVE_MEM_sp_input_system_bz2788_active scalar_processor_2400_dmem -#define HIVE_ADDR_sp_input_system_bz2788_active 0x2524 -#define HIVE_SIZE_sp_input_system_bz2788_active 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_IBUF_CTRL_PROCS -#define HIVE_MEM_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_IBUF_CTRL_PROCS 0x1FC -#define HIVE_SIZE_N_IBUF_CTRL_PROCS 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_IBUF_CTRL_PROCS 0x1FC -#define HIVE_SIZE_sp_N_IBUF_CTRL_PROCS 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_per_frame_data -#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_per_frame_data 0x3F48 -#define HIVE_SIZE_sp_per_frame_data 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_per_frame_data 0x3F48 -#define HIVE_SIZE_sp_sp_per_frame_data 4 - -/* function ia_css_rmgr_sp_vbuf_dequeue: 6472 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_psys_event_queue_handle -#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5CC4 -#define HIVE_SIZE_host2sp_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5CC4 -#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_xmem_bin_addr -#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_xmem_bin_addr 0x3F4C -#define HIVE_SIZE_xmem_bin_addr 4 -#else -#endif -#endif -#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_sp_xmem_bin_addr 0x3F4C -#define HIVE_SIZE_sp_xmem_bin_addr 4 - -/* function tmr_clock_init: 166F */ - -/* function ia_css_pipeline_sp_run: 1A61 */ - -/* function memcpy: 6AB4 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS -#define HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 -#define HIVE_SIZE_N_ISYS2401_DMA_CHANNEL_PROCS 4 -#else -#endif -#endif -#define HIVE_MEM_sp_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 -#define HIVE_SIZE_sp_N_ISYS2401_DMA_CHANNEL_PROCS 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GP_DEVICE_BASE -#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GP_DEVICE_BASE 0x39C -#define HIVE_SIZE_GP_DEVICE_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x39C -#define HIVE_SIZE_sp_GP_DEVICE_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue -#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x27C -#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x27C -#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 - -/* function stream2mmio_send_command: E04 */ - -/* function ia_css_uds_sp_scale_params: 67BD */ - -/* function ia_css_circbuf_increase_size: 1452 */ - -/* function __divu: 6A32 */ - -/* function ia_css_thread_sp_get_state: 1295 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_stop -#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_stop 0x5834 -#define HIVE_SIZE_sem_for_cont_capt_stop 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5834 -#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES -#define HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_N_SHORT_PACKET_LUT_ENTRIES 0x1AC -#define HIVE_SIZE_N_SHORT_PACKET_LUT_ENTRIES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_SHORT_PACKET_LUT_ENTRIES 0x1AC -#define HIVE_SIZE_sp_N_SHORT_PACKET_LUT_ENTRIES 12 - -/* function thread_fiber_sp_main: 144B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_pipe_thread -#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pipe_thread 0x5978 -#define HIVE_SIZE_sp_isp_pipe_thread 360 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x5978 -#define HIVE_SIZE_sp_sp_isp_pipe_thread 360 - -/* function ia_css_parambuf_sp_handle_parameter_sets: 18B5 */ - -/* function ia_css_spctrl_sp_set_state: 5ECF */ - -/* function ia_css_thread_sem_sp_signal: 6D18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_IRQ_BASE -#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_IRQ_BASE 0x2C -#define HIVE_SIZE_IRQ_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_IRQ_BASE 0x2C -#define HIVE_SIZE_sp_IRQ_BASE 16 - -/* function ia_css_virtual_isys_sp_isr_init: 5F70 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_TIMED_CTRL_BASE -#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_TIMED_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 - -/* function ia_css_isys_sp_generate_exp_id: 6302 */ - -/* function ia_css_rmgr_sp_init: 636D */ - -/* function ia_css_thread_sem_sp_init: 6DE7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_frame -#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_frame 0x5848 -#define HIVE_SIZE_sem_for_reading_cb_frame 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x5848 -#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_is_isp_requested -#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x3A8 -#define HIVE_SIZE_is_isp_requested 4 -#else -#endif -#endif -#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x3A8 -#define HIVE_SIZE_sp_is_isp_requested 4 - -/* function ia_css_dmaproxy_sp_execute: 3C9B */ - -/* function csi_rx_backend_rst: CE0 */ - -/* function ia_css_queue_is_empty: 7144 */ - -/* function ia_css_pipeline_sp_has_stopped: 1FB0 */ - -/* function ia_css_circbuf_extract: 1556 */ - -/* function ia_css_tagger_buf_sp_is_locked_from_start: 3572 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_sp_thread -#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_current_sp_thread 0x274 -#define HIVE_SIZE_current_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_sp_thread 0x274 -#define HIVE_SIZE_sp_current_sp_thread 4 - -/* function ia_css_spctrl_sp_get_spid: 5ED6 */ - -/* function ia_css_bufq_sp_reset_buffers: 3769 */ - -/* function ia_css_dmaproxy_sp_read_byte_addr: 7025 */ - -/* function ia_css_rmgr_sp_uninit: 6366 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack -#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_threads_stack 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_sp_threads_stack 24 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_STREAM2MMIO_SID_PROCS -#define HIVE_MEM_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_STREAM2MMIO_SID_PROCS 0x218 -#define HIVE_SIZE_N_STREAM2MMIO_SID_PROCS 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_STREAM2MMIO_SID_PROCS 0x218 -#define HIVE_SIZE_sp_N_STREAM2MMIO_SID_PROCS 12 - -/* function ia_css_circbuf_peek: 1538 */ - -/* function ia_css_parambuf_sp_wait_for_in_param: 167E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_param -#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_param 0x5870 -#define HIVE_SIZE_sp_all_cb_elems_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x5870 -#define HIVE_SIZE_sp_sp_all_cb_elems_param 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_pipeline_sp_curr_binary_id -#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x288 -#define HIVE_SIZE_pipeline_sp_curr_binary_id 4 -#else -#endif -#endif -#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x288 -#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame_desc -#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x5880 -#define HIVE_SIZE_sp_all_cbs_frame_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x5880 -#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 - -/* function sp_isys_copy_func_v2: 5BD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_param -#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_param 0x5888 -#define HIVE_SIZE_sem_for_reading_cb_param 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x5888 -#define HIVE_SIZE_sp_sem_for_reading_cb_param 40 - -/* function ia_css_queue_get_used_space: 54A6 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_start -#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_start 0x58B0 -#define HIVE_SIZE_sem_for_cont_capt_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x58B0 -#define HIVE_SIZE_sp_sem_for_cont_capt_start 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tmp_heap -#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_tmp_heap 0x7158 -#define HIVE_SIZE_tmp_heap 640 -#else -#endif -#endif -#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tmp_heap 0x7158 -#define HIVE_SIZE_sp_tmp_heap 640 - -/* function ia_css_rmgr_sp_get_num_vbuf: 6676 */ - -/* function ia_css_ispctrl_sp_output_compute_dma_info: 4A27 */ - -/* function ia_css_tagger_sp_lock_exp_id: 29E0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 - -/* function ia_css_queue_is_full: 553D */ - -/* function debug_buffer_init_isp: E4 */ - -/* function ia_css_tagger_sp_exp_id_is_locked: 2916 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem -#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7810 -#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7810 -#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 - -/* function ia_css_rmgr_sp_refcount_dump: 644D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_pipe_threads -#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_pipe_threads 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_sp_pipe_threads 20 - -/* function sp_event_proxy_func: 721 */ - -/* function ibuf_ctrl_run: D79 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_isys_event_queue_handle -#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5D20 -#define HIVE_SIZE_host2sp_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5D20 -#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 - -/* function ia_css_thread_sp_yield: 6C96 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param_desc -#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param_desc 0x58C4 -#define HIVE_SIZE_sp_all_cbs_param_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x58C4 -#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb -#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 -#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 -#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 - -/* function ia_css_thread_sp_fork: 1322 */ - -/* function ia_css_tagger_sp_destroy: 3107 */ - -/* function ia_css_dmaproxy_sp_vmem_read: 3C3B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES -#define HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_N_LONG_PACKET_LUT_ENTRIES 0x1B8 -#define HIVE_SIZE_N_LONG_PACKET_LUT_ENTRIES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_LONG_PACKET_LUT_ENTRIES 0x1B8 -#define HIVE_SIZE_sp_N_LONG_PACKET_LUT_ENTRIES 12 - -/* function initialize_sp_group: 58A */ - -/* function ia_css_tagger_buf_sp_peek: 337E */ - -/* function ia_css_thread_sp_init: 134E */ - -/* function qos_scheduler_update_fps: 67AD */ - -/* function ia_css_isys_sp_reset_exp_id: 62F9 */ - -/* function ia_css_ispctrl_sp_set_stream_base_addr: 5114 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_DMEM_BASE -#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_ISP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_sp_ISP_DMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_DMEM_BASE -#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_SP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_sp_SP_DMEM_BASE 4 - -/* function ibuf_ctrl_transfer: D61 */ - -/* function __ia_css_queue_is_empty_text: 5403 */ - -/* function ia_css_dmaproxy_sp_read: 3CB1 */ - -/* function virtual_isys_stream_is_capture_done: 5F94 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_raw_copy_line_count -#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_raw_copy_line_count 0x378 -#define HIVE_SIZE_raw_copy_line_count 4 -#else -#endif -#endif -#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_sp_raw_copy_line_count 0x378 -#define HIVE_SIZE_sp_raw_copy_line_count 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle -#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5D2C -#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5D2C -#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 - -/* function ia_css_queue_peek: 541C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt -#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5BD8 -#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5BD8 -#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_can_send_token_mask -#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_can_send_token_mask 0x88 -#define HIVE_SIZE_event_can_send_token_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_can_send_token_mask 0x88 -#define HIVE_SIZE_sp_event_can_send_token_mask 44 - -/* function csi_rx_frontend_stop: C0B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_thread -#define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_isp_thread 0x7088 -#define HIVE_SIZE_isp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_thread 0x7088 -#define HIVE_SIZE_sp_isp_thread 4 - -/* function encode_and_post_sp_event_non_blocking: A84 */ - -/* function is_ddr_debug_buffer_full: 2CC */ - -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 33CE */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_fiber -#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_fiber 0x194 -#define HIVE_SIZE_sp_threads_fiber 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_fiber 0x194 -#define HIVE_SIZE_sp_sp_threads_fiber 24 - -/* function encode_and_post_sp_event: A0D */ - -/* function debug_enqueue_ddr: EE */ - -/* function ia_css_rmgr_sp_refcount_init_vbuf: 6408 */ - -/* function dmaproxy_sp_read_write: 70C3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer -#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C -#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C -#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_buffer_queue_handle -#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5D38 -#define HIVE_SIZE_host2sp_buffer_queue_handle 480 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5D38 -#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_service -#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3074 -#define HIVE_SIZE_ia_css_flash_sp_in_service 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3074 -#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 - -/* function ia_css_dmaproxy_sp_process: 6E0F */ - -/* function ia_css_tagger_buf_sp_mark_from_end: 3656 */ - -/* function ia_css_ispctrl_sp_init_cs: 40FA */ - -/* function ia_css_spctrl_sp_init: 5EE4 */ - -/* function sp_event_proxy_init: 736 */ - -/* function input_system_input_port_close: 1095 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_output -#define HIVE_MEM_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_output 0x3F50 -#define HIVE_SIZE_sp_output 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_output 0x3F50 -#define HIVE_SIZE_sp_sp_output 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 - -/* function pixelgen_prbs_config: E8D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_CTRL_BASE -#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_ISP_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_sp_ISP_CTRL_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_INPUT_FORMATTER_BASE -#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_INPUT_FORMATTER_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 - -/* function sp_dma_proxy_reset_channels: 3F20 */ - -/* function ia_css_tagger_sp_update_size: 334D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue -#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x6260 -#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x6260 -#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 - -/* function thread_fiber_sp_create: 13BA */ - -/* function ia_css_dmaproxy_sp_set_increments: 3DB2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_frame -#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_frame 0x58CC -#define HIVE_SIZE_sem_for_writing_cb_frame 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x58CC -#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_param -#define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_param 0x58E0 -#define HIVE_SIZE_sem_for_writing_cb_param 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x58E0 -#define HIVE_SIZE_sp_sem_for_writing_cb_param 20 - -/* function pixelgen_tpg_is_done: F07 */ - -/* function ia_css_isys_stream_capture_indication: 60D7 */ - -/* function sp_start_isp_entry: 392 */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifdef HIVE_ADDR_sp_start_isp_entry -#endif -#define HIVE_ADDR_sp_start_isp_entry 0x392 -#endif -#define HIVE_ADDR_sp_sp_start_isp_entry 0x392 - -/* function ia_css_tagger_buf_sp_unmark_all: 35DA */ - -/* function ia_css_tagger_buf_sp_unmark_from_start: 361B */ - -/* function ia_css_dmaproxy_sp_channel_acquire: 3F4C */ - -/* function ia_css_rmgr_sp_add_num_vbuf: 6652 */ - -/* function ibuf_ctrl_config: D85 */ - -/* function ia_css_isys_stream_stop: 61F4 */ - -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3C07 */ - -/* function ia_css_tagger_sp_acquire_buf_elem: 28EE */ - -/* function ia_css_bufq_sp_is_dynamic_buffer: 3AB3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_group -#define HIVE_MEM_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_group 0x3F60 -#define HIVE_SIZE_sp_group 6296 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_group 0x3F60 -#define HIVE_SIZE_sp_sp_group 6296 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_event_proxy_thread -#define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_proxy_thread 0x5AE0 -#define HIVE_SIZE_sp_event_proxy_thread 72 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5AE0 -#define HIVE_SIZE_sp_sp_event_proxy_thread 72 - -/* function ia_css_thread_sp_kill: 12E8 */ - -/* function ia_css_tagger_sp_create: 32FB */ - -/* function tmpmem_acquire_dmem: 66FF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_MMU_BASE -#define HIVE_MEM_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_MMU_BASE 0x24 -#define HIVE_SIZE_MMU_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_MMU_BASE 0x24 -#define HIVE_SIZE_sp_MMU_BASE 8 - -/* function ia_css_dmaproxy_sp_channel_release: 3F38 */ - -/* function pixelgen_prbs_run: E7B */ - -/* function ia_css_dmaproxy_sp_is_idle: 3F18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_qos_start -#define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_qos_start 0x58F4 -#define HIVE_SIZE_sem_for_qos_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_qos_start 0x58F4 -#define HIVE_SIZE_sp_sem_for_qos_start 20 - -/* function isp_hmem_load: B5D */ - -/* function ia_css_tagger_sp_release_buf_elem: 28CA */ - -/* function ia_css_eventq_sp_send: 3F8E */ - -/* function ia_css_tagger_buf_sp_unlock_from_start: 350A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_debug_buffer_ddr_address -#define HIVE_MEM_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_debug_buffer_ddr_address 4 -#else -#endif -#endif -#define HIVE_MEM_sp_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_sp_debug_buffer_ddr_address 4 - -/* function sp_isys_copy_request: 681 */ - -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 64E2 */ - -/* function ia_css_thread_sp_set_priority: 12E0 */ - -/* function sizeof_hmem: C04 */ - -/* function input_system_channel_open: 11BC */ - -/* function pixelgen_tpg_stop: EF5 */ - -/* function tmpmem_release_dmem: 66EE */ - -/* function __ia_css_dmaproxy_sp_process_text: 3BAB */ - -/* function ia_css_dmaproxy_sp_set_width_exception: 3D9D */ - -/* function sp_event_assert: 8BD */ - -/* function ia_css_flash_sp_init_internal_params: 36D7 */ - -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 3410 */ - -/* function __modu: 6A78 */ - -/* function ia_css_dmaproxy_sp_init_isp_vector: 3C0D */ - -/* function input_system_channel_transfer: 11A5 */ - -/* function isp_vamem_store: 0 */ - -/* function ia_css_tagger_sp_set_copy_pipe: 32F2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GDC_BASE -#define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GDC_BASE 0x44 -#define HIVE_SIZE_GDC_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GDC_BASE 0x44 -#define HIVE_SIZE_sp_GDC_BASE 8 - -/* function ia_css_queue_local_init: 5707 */ - -/* function sp_event_proxy_callout_func: 6B45 */ - -/* function qos_scheduler_schedule_stage: 6759 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads -#define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5B28 -#define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5B28 -#define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack_size -#define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack_size 0x17C -#define HIVE_SIZE_sp_threads_stack_size 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack_size 0x17C -#define HIVE_SIZE_sp_sp_threads_stack_size 24 - -/* function ia_css_ispctrl_sp_isp_done_row_striping: 4A0D */ - -/* function __ia_css_virtual_isys_sp_isr_text: 5F4E */ - -/* function ia_css_queue_dequeue: 5585 */ - -/* function is_qos_standalone_mode: 6734 */ - -/* function ia_css_dmaproxy_sp_configure_channel: 703C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_thread_fiber_sp -#define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_current_thread_fiber_sp 0x5B2C -#define HIVE_SIZE_current_thread_fiber_sp 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5B2C -#define HIVE_SIZE_sp_current_thread_fiber_sp 4 - -/* function ia_css_circbuf_pop: 15EA */ - -/* function memset: 6AF7 */ - -/* function irq_raise_set_token: B6 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GPIO_BASE -#define HIVE_MEM_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GPIO_BASE 0x3C -#define HIVE_SIZE_GPIO_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GPIO_BASE 0x3C -#define HIVE_SIZE_sp_GPIO_BASE 4 - -/* function pixelgen_prbs_stop: E69 */ - -/* function ia_css_pipeline_acc_stage_enable: 1F69 */ - -/* function ia_css_tagger_sp_unlock_exp_id: 293B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_ph -#define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_isp_ph 0x740C -#define HIVE_SIZE_isp_ph 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_ph 0x740C -#define HIVE_SIZE_sp_isp_ph 28 - -/* function ia_css_ispctrl_sp_init_ds: 4286 */ - -/* function get_xmem_base_addr_raw: 4635 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param -#define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param 0x5908 -#define HIVE_SIZE_sp_all_cbs_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param 0x5908 -#define HIVE_SIZE_sp_sp_all_cbs_param 16 - -/* function pixelgen_tpg_config: F2A */ - -/* function ia_css_circbuf_create: 1638 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp_group -#define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp_group 0x5918 -#define HIVE_SIZE_sem_for_sp_group 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp_group 0x5918 -#define HIVE_SIZE_sp_sem_for_sp_group 20 - -/* function csi_rx_frontend_run: C1C */ - -/* function __ia_css_dmaproxy_sp_configure_channel_text: 3D7C */ - -/* function ia_css_framebuf_sp_wait_for_in_frame: 667D */ - -/* function ia_css_isys_stream_open: 62A9 */ - -/* function ia_css_sp_rawcopy_tag_frame: 5E35 */ - -/* function input_system_channel_configure: 11D8 */ - -/* function isp_hmem_clear: B2D */ - -/* function ia_css_framebuf_sp_release_in_frame: 66C0 */ - -/* function stream2mmio_config: E15 */ - -/* function ia_css_ispctrl_sp_start_binary: 40D8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 - -/* function ia_css_eventq_sp_recv: 3F60 */ - -/* function csi_rx_frontend_config: C74 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_pool -#define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_isp_pool 0x388 -#define HIVE_SIZE_isp_pool 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pool 0x388 -#define HIVE_SIZE_sp_isp_pool 4 - -/* function ia_css_rmgr_sp_rel_gen: 63AF */ - -/* function ia_css_tagger_sp_unblock_clients: 31C3 */ - -/* function css_get_frame_processing_time_end: 28BA */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_any_pending_mask -#define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_any_pending_mask 0x3A0 -#define HIVE_SIZE_event_any_pending_mask 8 -#else -#endif -#endif -#define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_any_pending_mask 0x3A0 -#define HIVE_SIZE_sp_event_any_pending_mask 8 - -/* function ia_css_pipeline_sp_get_pipe_io_status: 1A5A */ - -/* function sh_css_decode_tag_descr: 352 */ - -/* function debug_enqueue_isp: 27B */ - -/* function qos_scheduler_update_stage_budget: 673C */ - -/* function ia_css_spctrl_sp_uninit: 5EDD */ - -/* function csi_rx_backend_run: C62 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 - -/* function ia_css_tagger_buf_sp_lock_from_start: 353E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_isp_idle -#define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_isp_idle 0x592C -#define HIVE_SIZE_sem_for_isp_idle 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_isp_idle 0x592C -#define HIVE_SIZE_sp_sem_for_isp_idle 20 - -/* function ia_css_dmaproxy_sp_write_byte_addr: 3C6A */ - -/* function ia_css_dmaproxy_sp_init: 3BE1 */ - -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 37A9 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_VAMEM_BASE -#define HIVE_MEM_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_ISP_VAMEM_BASE 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 - -/* function input_system_channel_sync: 6C10 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger -#define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x73D8 -#define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x73D8 -#define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 - -/* function ia_css_queue_item_load: 57F9 */ - -/* function ia_css_spctrl_sp_get_state: 5EC8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_callout_sp_thread -#define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_callout_sp_thread 0x278 -#define HIVE_SIZE_callout_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_callout_sp_thread 0x278 -#define HIVE_SIZE_sp_callout_sp_thread 4 - -/* function thread_fiber_sp_init: 1441 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_PMEM_BASE -#define HIVE_MEM_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_SP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_sp_SP_PMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_input_stream_format -#define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_input_stream_format 0x3E50 -#define HIVE_SIZE_sp_isp_input_stream_format 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E50 -#define HIVE_SIZE_sp_sp_isp_input_stream_format 20 - -/* function __mod: 6A64 */ - -/* function ia_css_dmaproxy_sp_init_dmem_channel: 3CCB */ - -/* function ia_css_thread_sp_join: 1311 */ - -/* function ia_css_dmaproxy_sp_add_command: 712E */ - -/* function ia_css_sp_metadata_thread_func: 5EC1 */ - -/* function __sp_event_proxy_func_critical: 6B32 */ - -/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 6074 */ - -/* function ia_css_sp_metadata_wait: 5EBA */ - -/* function ia_css_circbuf_peek_from_start: 151A */ - -/* function ia_css_event_sp_encode: 3FEB */ - -/* function ia_css_thread_sp_run: 1384 */ - -/* function sp_isys_copy_func: 5AC */ - -/* function ia_css_sp_isp_param_init_isp_memories: 52AC */ - -/* function register_isr: 8B5 */ - -/* function irq_raise: C8 */ - -/* function ia_css_dmaproxy_sp_mmu_invalidate: 3B71 */ - -/* function csi_rx_backend_disable: C2E */ - -/* function pipeline_sp_initialize_stage: 20BF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES -#define HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem -#define HIVE_ADDR_N_CSI_RX_FE_CTRL_DLANES 0x1C4 -#define HIVE_SIZE_N_CSI_RX_FE_CTRL_DLANES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_CSI_RX_FE_CTRL_DLANES 0x1C4 -#define HIVE_SIZE_sp_N_CSI_RX_FE_CTRL_DLANES 12 - -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 700E */ - -/* function ia_css_ispctrl_sp_done_ds: 426D */ - -/* function csi_rx_backend_config: C85 */ - -/* function ia_css_sp_isp_param_get_mem_inits: 5287 */ - -/* function ia_css_parambuf_sp_init_buffer_queues: 1A27 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_pfp_spref -#define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_pfp_spref 0x390 -#define HIVE_SIZE_vbuf_pfp_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x390 -#define HIVE_SIZE_sp_vbuf_pfp_spref 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_HMEM_BASE -#define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_ISP_HMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_sp_ISP_HMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6B20 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6B20 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 - -/* function qos_scheduler_init_stage_budget: 679A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_buffer_queue_handle -#define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6C38 -#define HIVE_SIZE_sp2host_buffer_queue_handle 96 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6C38 -#define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 - -/* function ia_css_ispctrl_sp_init_isp_vars: 4F79 */ - -/* function ia_css_isys_stream_start: 6187 */ - -/* function sp_warning: 8E8 */ - -/* function ia_css_rmgr_sp_vbuf_enqueue: 64A2 */ - -/* function ia_css_tagger_sp_tag_exp_id: 2A55 */ - -/* function ia_css_pipeline_sp_sfi_release_current_frame: 273C */ - -/* function ia_css_dmaproxy_sp_write: 3C81 */ - -/* function ia_css_isys_stream_start_async: 6250 */ - -/* function ia_css_parambuf_sp_release_in_param: 187B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_irq_sw_interrupt_token -#define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_irq_sw_interrupt_token 0x3E4C -#define HIVE_SIZE_irq_sw_interrupt_token 4 -#else -#endif -#endif -#define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E4C -#define HIVE_SIZE_sp_irq_sw_interrupt_token 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_addresses -#define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_addresses 0x708C -#define HIVE_SIZE_sp_isp_addresses 172 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_addresses 0x708C -#define HIVE_SIZE_sp_sp_isp_addresses 172 - -/* function ia_css_rmgr_sp_acq_gen: 63C7 */ - -/* function input_system_input_port_open: 10E7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isps -#define HIVE_MEM_isps scalar_processor_2400_dmem -#define HIVE_ADDR_isps 0x7428 -#define HIVE_SIZE_isps 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isps 0x7428 -#define HIVE_SIZE_sp_isps 28 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_queues_initialized -#define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_queues_initialized 0x3E64 -#define HIVE_SIZE_host_sp_queues_initialized 4 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E64 -#define HIVE_SIZE_sp_host_sp_queues_initialized 4 - -/* function ia_css_queue_uninit: 56C5 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started -#define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6D40 -#define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6D40 -#define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 - -/* function ia_css_bufq_sp_release_dynamic_buf: 3815 */ - -/* function ia_css_dmaproxy_sp_set_height_exception: 3D8E */ - -/* function ia_css_dmaproxy_sp_init_vmem_channel: 3CFF */ - -/* function csi_rx_backend_stop: C51 */ - -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3C53 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_spref -#define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_spref 0x38C -#define HIVE_SIZE_vbuf_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_spref 0x38C -#define HIVE_SIZE_sp_vbuf_spref 4 - -/* function ia_css_queue_enqueue: 560F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_request -#define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_request 0x5BDC -#define HIVE_SIZE_ia_css_flash_sp_request 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5BDC -#define HIVE_SIZE_sp_ia_css_flash_sp_request 4 - -/* function ia_css_dmaproxy_sp_vmem_write: 3C24 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tagger_frames -#define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_tagger_frames 0x5B30 -#define HIVE_SIZE_tagger_frames 168 -#else -#endif -#endif -#define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tagger_frames 0x5B30 -#define HIVE_SIZE_sp_tagger_frames 168 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_if -#define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_if 0x5940 -#define HIVE_SIZE_sem_for_reading_if 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_if 0x5940 -#define HIVE_SIZE_sp_sem_for_reading_if 20 - -/* function sp_generate_interrupts: 967 */ - -/* function ia_css_pipeline_sp_start: 1FC2 */ - -/* function ia_css_thread_default_callout: 6C8F */ - -/* function csi_rx_backend_enable: C3F */ - -/* function ia_css_sp_rawcopy_init: 5B32 */ - -/* function input_system_input_port_configure: 1139 */ - -/* function tmr_clock_read: 1665 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_BAMEM_BASE -#define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_BAMEM_BASE 0x398 -#define HIVE_SIZE_ISP_BAMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x398 -#define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 - -/* function isys2401_dma_config_legacy: DDA */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ibuf_ctrl_master_ports -#define HIVE_MEM_ibuf_ctrl_master_ports scalar_processor_2400_dmem -#define HIVE_ADDR_ibuf_ctrl_master_ports 0x208 -#define HIVE_SIZE_ibuf_ctrl_master_ports 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ibuf_ctrl_master_ports scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ibuf_ctrl_master_ports 0x208 -#define HIVE_SIZE_sp_ibuf_ctrl_master_ports 12 - -/* function css_get_frame_processing_time_start: 28C2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame -#define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame 0x5954 -#define HIVE_SIZE_sp_all_cbs_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x5954 -#define HIVE_SIZE_sp_sp_all_cbs_frame 16 - -/* function ia_css_virtual_isys_sp_isr: 716E */ - -/* function thread_sp_queue_print: 13A1 */ - -/* function sp_notify_eof: 913 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_str2mem -#define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_str2mem 0x5964 -#define HIVE_SIZE_sem_for_str2mem 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_str2mem 0x5964 -#define HIVE_SIZE_sp_sem_for_str2mem 20 - -/* function ia_css_tagger_buf_sp_is_marked_from_start: 35A6 */ - -/* function ia_css_bufq_sp_acquire_dynamic_buf: 39CD */ - -/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 2890 */ - -/* function ia_css_circbuf_destroy: 162F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_PMEM_BASE -#define HIVE_MEM_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_ISP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_sp_ISP_PMEM_BASE 4 - -/* function ia_css_sp_isp_param_mem_load: 521A */ - -/* function ia_css_tagger_buf_sp_pop_from_start: 3392 */ - -/* function __div: 6A1C */ - -/* function ia_css_rmgr_sp_refcount_release_vbuf: 64C1 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_use -#define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5BE0 -#define HIVE_SIZE_ia_css_flash_sp_in_use 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5BE0 -#define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 - -/* function ia_css_thread_sem_sp_wait: 6D63 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sleep_mode -#define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sleep_mode 0x3E68 -#define HIVE_SIZE_sp_sleep_mode 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sleep_mode 0x3E68 -#define HIVE_SIZE_sp_sp_sleep_mode 4 - -/* function ia_css_tagger_buf_sp_push: 34A1 */ - -/* function mmu_invalidate_cache: D3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_max_cb_elems -#define HIVE_MEM_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_max_cb_elems 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_sp_max_cb_elems 8 - -/* function ia_css_queue_remote_init: 56E7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stop_req -#define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stop_req 0x57F8 -#define HIVE_SIZE_isp_stop_req 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stop_req 0x57F8 -#define HIVE_SIZE_sp_isp_stop_req 4 - -/* function ia_css_pipeline_sp_sfi_request_next_frame: 2752 */ - - -#endif /* _sp_map_h_ */ diff --git a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c index 3d7b0242cf53..6fadc20104bf 100644 --- a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c +++ b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c @@ -3538,7 +3538,3 @@ void ia_css_debug_pc_dump(sp_ID_t id, unsigned int num_of_dumps) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d PC: 0x%X\n", id, pc); } } - -#if defined(HRT_SCHED) || defined(SH_CSS_DEBUG_SPMEM_DUMP_SUPPORT) -#include "spmem_dump.c" -#endif |