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-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_object.c10
-rw-r--r--include/uapi/drm/amdgpu_drm.h7
2 files changed, 4 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index f5e17f95e812..992b7f5843bc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -132,10 +132,7 @@ void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *rbo, u32 domain)
}
if (domain & AMDGPU_GEM_DOMAIN_GTT) {
- if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_UC) {
- rbo->placements[c].fpfn = 0;
- rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_TT;
- } else if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_WC) {
+ if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) {
rbo->placements[c].fpfn = 0;
rbo->placements[c++].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_TT |
TTM_PL_FLAG_UNCACHED;
@@ -146,10 +143,7 @@ void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *rbo, u32 domain)
}
if (domain & AMDGPU_GEM_DOMAIN_CPU) {
- if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_UC) {
- rbo->placements[c].fpfn = 0;
- rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_SYSTEM;
- } else if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_WC) {
+ if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) {
rbo->placements[c].fpfn = 0;
rbo->placements[c++].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_SYSTEM |
TTM_PL_FLAG_UNCACHED;
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 9e771fb858b4..77bc5740fd7c 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -73,15 +73,12 @@
#define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0)
/* Flag that CPU access will not work, this VRAM domain is invisible */
#define AMDGPU_GEM_CREATE_NO_CPU_ACCESS (1 << 1)
-/* Flag that un-cached attributes should be used for GTT */
-#define AMDGPU_GEM_CREATE_CPU_GTT_UC (1 << 2)
/* Flag that USWC attributes should be used for GTT */
-#define AMDGPU_GEM_CREATE_CPU_GTT_WC (1 << 3)
+#define AMDGPU_GEM_CREATE_CPU_GTT_USWC (1 << 2)
/* Flag mask for GTT domain_flags */
#define AMDGPU_GEM_CREATE_CPU_GTT_MASK \
- (AMDGPU_GEM_CREATE_CPU_GTT_WC | \
- AMDGPU_GEM_CREATE_CPU_GTT_UC | \
+ (AMDGPU_GEM_CREATE_CPU_GTT_USWC | \
AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | \
AMDGPU_GEM_CREATE_NO_CPU_ACCESS)