diff options
21 files changed, 85 insertions, 95 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index 103dfe82dc28..7561fe748c72 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -1563,7 +1563,7 @@ enum dc_status resource_build_scaling_params_for_context( return DC_OK; } -struct pipe_ctx *find_idle_secondary_pipe_legacy( +struct pipe_ctx *find_free_secondary_pipe_legacy( struct resource_context *res_ctx, const struct resource_pool *pool, const struct pipe_ctx *primary_pipe) @@ -1623,38 +1623,38 @@ struct pipe_ctx *find_idle_secondary_pipe_legacy( return secondary_pipe; } -int resource_find_idle_pipe_used_in_cur_mpc_blending_tree( +int resource_find_free_pipe_used_in_cur_mpc_blending_tree( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct pipe_ctx *cur_opp_head) { const struct pipe_ctx *cur_sec_dpp = cur_opp_head->bottom_pipe; struct pipe_ctx *new_sec_dpp; - int idle_pipe_idx = IDLE_PIPE_INDEX_NOT_FOUND; + int free_pipe_idx = FREE_PIPE_INDEX_NOT_FOUND; while (cur_sec_dpp) { - /* find an idle pipe used in current opp blend tree, + /* find a free pipe used in current opp blend tree, * this is to avoid MPO pipe switching to different opp blending * tree */ new_sec_dpp = &new_res_ctx->pipe_ctx[cur_sec_dpp->pipe_idx]; if (new_sec_dpp->plane_state == NULL && new_sec_dpp->stream == NULL) { - idle_pipe_idx = cur_sec_dpp->pipe_idx; + free_pipe_idx = cur_sec_dpp->pipe_idx; break; } cur_sec_dpp = cur_sec_dpp->bottom_pipe; } - return idle_pipe_idx; + return free_pipe_idx; } -int recource_find_idle_pipe_not_used_in_cur_res_ctx( +int recource_find_free_pipe_not_used_in_cur_res_ctx( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct resource_pool *pool) { - int idle_pipe_idx = IDLE_PIPE_INDEX_NOT_FOUND; + int free_pipe_idx = FREE_PIPE_INDEX_NOT_FOUND; const struct pipe_ctx *new_sec_dpp, *cur_sec_dpp; int i; @@ -1666,20 +1666,20 @@ int recource_find_idle_pipe_not_used_in_cur_res_ctx( cur_sec_dpp->stream == NULL && new_sec_dpp->plane_state == NULL && new_sec_dpp->stream == NULL) { - idle_pipe_idx = i; + free_pipe_idx = i; break; } } - return idle_pipe_idx; + return free_pipe_idx; } -int resource_find_idle_pipe_used_as_cur_sec_dpp_in_mpcc_combine( +int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct resource_pool *pool) { - int idle_pipe_idx = IDLE_PIPE_INDEX_NOT_FOUND; + int free_pipe_idx = FREE_PIPE_INDEX_NOT_FOUND; const struct pipe_ctx *new_sec_dpp, *cur_sec_dpp; int i; @@ -1692,18 +1692,18 @@ int resource_find_idle_pipe_used_as_cur_sec_dpp_in_mpcc_combine( cur_sec_dpp->top_pipe->plane_state == cur_sec_dpp->plane_state && new_sec_dpp->plane_state == NULL && new_sec_dpp->stream == NULL) { - idle_pipe_idx = i; + free_pipe_idx = i; break; } } - return idle_pipe_idx; + return free_pipe_idx; } -int resource_find_any_idle_pipe(struct resource_context *new_res_ctx, +int resource_find_any_free_pipe(struct resource_context *new_res_ctx, const struct resource_pool *pool) { - int idle_pipe_idx = IDLE_PIPE_INDEX_NOT_FOUND; + int free_pipe_idx = FREE_PIPE_INDEX_NOT_FOUND; const struct pipe_ctx *new_sec_dpp; int i; @@ -1712,12 +1712,12 @@ int resource_find_any_idle_pipe(struct resource_context *new_res_ctx, if (new_sec_dpp->plane_state == NULL && new_sec_dpp->stream == NULL) { - idle_pipe_idx = i; + free_pipe_idx = i; break; } } - return idle_pipe_idx; + return free_pipe_idx; } /* TODO: Unify the pipe naming convention: @@ -1855,12 +1855,12 @@ static bool acquire_secondary_dpp_pipes_and_add_plane( { struct pipe_ctx *opp_head_pipe, *sec_pipe; - if (!pool->funcs->acquire_idle_pipe_for_layer) + if (!pool->funcs->acquire_free_pipe_as_secondary_dpp_pipe) return false; opp_head_pipe = otg_master_pipe; while (opp_head_pipe) { - sec_pipe = pool->funcs->acquire_idle_pipe_for_layer( + sec_pipe = pool->funcs->acquire_free_pipe_as_secondary_dpp_pipe( cur_ctx, new_ctx, pool, diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c index b17134504944..c0214da714d4 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c @@ -1235,7 +1235,7 @@ static const struct resource_funcs dce110_res_pool_funcs = { .panel_cntl_create = dce110_panel_cntl_create, .validate_bandwidth = dce110_validate_bandwidth, .validate_plane = dce110_validate_plane, - .acquire_idle_pipe_for_layer = dce110_acquire_underlay, + .acquire_free_pipe_as_secondary_dpp_pipe = dce110_acquire_underlay, .add_stream_to_ctx = dce110_add_stream_to_ctx, .validate_global = dce110_validate_global, .find_first_free_match_stream_enc_for_link = dce110_find_first_free_match_stream_enc_for_link diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c index 292e71b99808..82e5af4d5d15 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c @@ -1083,7 +1083,7 @@ static enum dc_status dcn10_add_stream_to_ctx( return result; } -static struct pipe_ctx *dcn10_acquire_idle_pipe_for_layer( +static struct pipe_ctx *dcn10_acquire_free_pipe_for_layer( const struct dc_state *cur_ctx, struct dc_state *new_ctx, const struct resource_pool *pool, @@ -1091,7 +1091,7 @@ static struct pipe_ctx *dcn10_acquire_idle_pipe_for_layer( { struct resource_context *res_ctx = &new_ctx->res_ctx; struct pipe_ctx *head_pipe = resource_get_head_pipe_for_stream(res_ctx, opp_head_pipe->stream); - struct pipe_ctx *idle_pipe = find_idle_secondary_pipe_legacy(res_ctx, pool, head_pipe); + struct pipe_ctx *idle_pipe = find_free_secondary_pipe_legacy(res_ctx, pool, head_pipe); if (!head_pipe) { ASSERT(0); @@ -1272,7 +1272,7 @@ static const struct resource_funcs dcn10_res_pool_funcs = { .link_enc_create = dcn10_link_encoder_create, .panel_cntl_create = dcn10_panel_cntl_create, .validate_bandwidth = dcn10_validate_bandwidth, - .acquire_idle_pipe_for_layer = dcn10_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn10_acquire_free_pipe_for_layer, .validate_plane = dcn10_validate_plane, .validate_global = dcn10_validate_global, .add_stream_to_ctx = dcn10_add_stream_to_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c index d526f06e8f1a..dfecb9602f49 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c @@ -2147,7 +2147,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, return voltage_supported; } -struct pipe_ctx *dcn20_acquire_idle_pipe_for_layer( +struct pipe_ctx *dcn20_acquire_free_pipe_for_layer( const struct dc_state *cur_ctx, struct dc_state *new_ctx, const struct resource_pool *pool, @@ -2155,7 +2155,7 @@ struct pipe_ctx *dcn20_acquire_idle_pipe_for_layer( { struct resource_context *res_ctx = &new_ctx->res_ctx; struct pipe_ctx *head_pipe = resource_get_head_pipe_for_stream(res_ctx, opp_head_pipe->stream); - struct pipe_ctx *idle_pipe = find_idle_secondary_pipe_legacy(res_ctx, pool, head_pipe); + struct pipe_ctx *idle_pipe = find_free_secondary_pipe_legacy(res_ctx, pool, head_pipe); if (!head_pipe) ASSERT(0); @@ -2217,7 +2217,7 @@ static const struct resource_funcs dcn20_res_pool_funcs = { .link_enc_create = dcn20_link_encoder_create, .panel_cntl_create = dcn20_panel_cntl_create, .validate_bandwidth = dcn20_validate_bandwidth, - .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, .add_stream_to_ctx = dcn20_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h index 67a78ea2c0e4..6d1a8924e57b 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h @@ -58,7 +58,7 @@ unsigned int dcn20_calc_max_scaled_time( enum mmhubbub_wbif_mode mode, unsigned int urgent_watermark); -struct pipe_ctx *dcn20_acquire_idle_pipe_for_layer( +struct pipe_ctx *dcn20_acquire_free_pipe_for_layer( const struct dc_state *cur_ctx, struct dc_state *new_ctx, const struct resource_pool *pool, diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c index 1a8927e9b64b..4fce3485d0f5 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c @@ -992,7 +992,7 @@ static struct hubp *dcn201_hubp_create( return NULL; } -static struct pipe_ctx *dcn201_acquire_idle_pipe_for_layer( +static struct pipe_ctx *dcn201_acquire_free_pipe_for_layer( const struct dc_state *cur_ctx, struct dc_state *new_ctx, const struct resource_pool *pool, @@ -1000,7 +1000,7 @@ static struct pipe_ctx *dcn201_acquire_idle_pipe_for_layer( { struct resource_context *res_ctx = &new_ctx->res_ctx; struct pipe_ctx *head_pipe = resource_get_head_pipe_for_stream(res_ctx, opp_head_pipe->stream); - struct pipe_ctx *idle_pipe = find_idle_secondary_pipe_legacy(res_ctx, pool, head_pipe); + struct pipe_ctx *idle_pipe = find_free_secondary_pipe_legacy(res_ctx, pool, head_pipe); if (!head_pipe) ASSERT(0); @@ -1068,7 +1068,7 @@ static struct resource_funcs dcn201_res_pool_funcs = { .add_stream_to_ctx = dcn20_add_stream_to_ctx, .add_dsc_to_stream_resource = NULL, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, - .acquire_idle_pipe_for_layer = dcn201_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn201_acquire_free_pipe_for_layer, .populate_dml_writeback_from_context = dcn201_populate_dml_writeback_from_context, .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, .set_mcif_arb_params = dcn20_set_mcif_arb_params, diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c index 9e7bffebe052..d1a25fe6c44f 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c @@ -1388,7 +1388,7 @@ static const struct resource_funcs dcn21_res_pool_funcs = { .add_stream_to_ctx = dcn20_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, - .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, .populate_dml_writeback_from_context = dcn20_populate_dml_writeback_from_context, .patch_unknown_plane_state = dcn21_patch_unknown_plane_state, .set_mcif_arb_params = dcn20_set_mcif_arb_params, diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c index 268b2df8c496..e6220ecf1d7d 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c @@ -2215,7 +2215,7 @@ static const struct resource_funcs dcn30_res_pool_funcs = { .calculate_wm_and_dlg = dcn30_calculate_wm_and_dlg, .update_soc_for_wm_a = dcn30_update_soc_for_wm_a, .populate_dml_pipes = dcn30_populate_dml_pipes_from_context, - .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c index f856a4773c27..79d6697d13b6 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c @@ -1379,7 +1379,7 @@ static struct resource_funcs dcn301_res_pool_funcs = { .calculate_wm_and_dlg = dcn301_calculate_wm_and_dlg, .update_soc_for_wm_a = dcn30_update_soc_for_wm_a, .populate_dml_pipes = dcn30_populate_dml_pipes_from_context, - .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c index 4b4f065de8bd..447abcd593be 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c @@ -1136,7 +1136,7 @@ static struct resource_funcs dcn302_res_pool_funcs = { .calculate_wm_and_dlg = dcn30_calculate_wm_and_dlg, .update_soc_for_wm_a = dcn30_update_soc_for_wm_a, .populate_dml_pipes = dcn30_populate_dml_pipes_from_context, - .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c index 6c80d3f573eb..adf4989177f7 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c @@ -1062,7 +1062,7 @@ static struct resource_funcs dcn303_res_pool_funcs = { .calculate_wm_and_dlg = dcn30_calculate_wm_and_dlg, .update_soc_for_wm_a = dcn30_update_soc_for_wm_a, .populate_dml_pipes = dcn30_populate_dml_pipes_from_context, - .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c index 3c7b75cb5d2e..cdaa33707f5c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c @@ -1823,7 +1823,7 @@ static struct resource_funcs dcn31_res_pool_funcs = { .calculate_wm_and_dlg = dcn31_calculate_wm_and_dlg, .update_soc_for_wm_a = dcn31_update_soc_for_wm_a, .populate_dml_pipes = dcn31_populate_dml_pipes_from_context, - .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c index c10b3350a9fa..5e9459e26469 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c @@ -1771,7 +1771,7 @@ static struct resource_funcs dcn314_res_pool_funcs = { .calculate_wm_and_dlg = dcn31_calculate_wm_and_dlg, .update_soc_for_wm_a = dcn31_update_soc_for_wm_a, .populate_dml_pipes = dcn314_populate_dml_pipes_from_context, - .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c index dbdee36b6db5..127487ea3d7d 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c @@ -1818,7 +1818,7 @@ static struct resource_funcs dcn315_res_pool_funcs = { .calculate_wm_and_dlg = dcn31_calculate_wm_and_dlg, .update_soc_for_wm_a = dcn315_update_soc_for_wm_a, .populate_dml_pipes = dcn315_populate_dml_pipes_from_context, - .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c b/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c index 34682e6ae8c3..5fe2c61527df 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c @@ -1705,7 +1705,7 @@ static struct resource_funcs dcn316_res_pool_funcs = { .calculate_wm_and_dlg = dcn31_calculate_wm_and_dlg, .update_soc_for_wm_a = dcn31_update_soc_for_wm_a, .populate_dml_pipes = dcn316_populate_dml_pipes_from_context, - .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c index 2615a89d580b..cadbe1dcfbfe 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c @@ -2038,7 +2038,7 @@ static struct resource_funcs dcn32_res_pool_funcs = { .validate_bandwidth = dcn32_validate_bandwidth, .calculate_wm_and_dlg = dcn32_calculate_wm_and_dlg, .populate_dml_pipes = dcn32_populate_dml_pipes_from_context, - .acquire_idle_pipe_for_layer = dcn32_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn32_acquire_free_pipe_as_secondary_dpp_pipe, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, @@ -2486,10 +2486,10 @@ struct resource_pool *dcn32_create_resource_pool( } /* - * Find the most optimal idle pipe from res_ctx, which could be used as a + * Find the most optimal free pipe from res_ctx, which could be used as a * secondary dpp pipe for input opp head pipe. * - * an idle pipe - a pipe in input res_ctx not yet used for any streams or + * a free pipe - a pipe in input res_ctx not yet used for any streams or * planes. * secondary dpp pipe - a pipe gets inserted to a head OPP pipe's MPC blending * tree. This is typical used for rendering MPO planes or additional offset @@ -2522,78 +2522,78 @@ struct resource_pool *dcn32_create_resource_pool( * * 2. We want to in general minimize the unnecessary changes in pipe topology. * If a pipe is already added in current blending tree and there are no changes - * to plane topology, we don't want to swap it with another idle pipe + * to plane topology, we don't want to swap it with another free pipe * unnecessarily in every update. Powering up and down a pipe would require a * full update which delays the flip for 1 frame. If we use the original pipe * we don't have to toggle its power. So we can flip faster. */ -static int find_optimal_idle_pipe_as_secondary_dpp_pipe( +static int find_optimal_free_pipe_as_secondary_dpp_pipe( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct resource_pool *pool, const struct pipe_ctx *new_opp_head) { const struct pipe_ctx *cur_opp_head; - int idle_pipe_idx; + int free_pipe_idx; cur_opp_head = &cur_res_ctx->pipe_ctx[new_opp_head->pipe_idx]; - idle_pipe_idx = resource_find_idle_pipe_used_in_cur_mpc_blending_tree( + free_pipe_idx = resource_find_free_pipe_used_in_cur_mpc_blending_tree( cur_res_ctx, new_res_ctx, cur_opp_head); - /* Up until here if we have not found an idle secondary pipe, we will + /* Up until here if we have not found a free secondary pipe, we will * need to wait for at least one frame to complete the transition * sequence. */ - if (idle_pipe_idx == IDLE_PIPE_INDEX_NOT_FOUND) - idle_pipe_idx = recource_find_idle_pipe_not_used_in_cur_res_ctx( + if (free_pipe_idx == FREE_PIPE_INDEX_NOT_FOUND) + free_pipe_idx = recource_find_free_pipe_not_used_in_cur_res_ctx( cur_res_ctx, new_res_ctx, pool); - /* Up until here if we have not found an idle secondary pipe, we will + /* Up until here if we have not found a free secondary pipe, we will * need to wait for at least two frames to complete the transition * sequence. It really doesn't matter which pipe we decide take from * current enabled pipes. It won't save our frame time when we swap only * one pipe or more pipes. */ - if (idle_pipe_idx == IDLE_PIPE_INDEX_NOT_FOUND) - idle_pipe_idx = resource_find_idle_pipe_used_as_cur_sec_dpp_in_mpcc_combine( + if (free_pipe_idx == FREE_PIPE_INDEX_NOT_FOUND) + free_pipe_idx = resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine( cur_res_ctx, new_res_ctx, pool); - if (idle_pipe_idx == IDLE_PIPE_INDEX_NOT_FOUND) - idle_pipe_idx = resource_find_any_idle_pipe(new_res_ctx, pool); + if (free_pipe_idx == FREE_PIPE_INDEX_NOT_FOUND) + free_pipe_idx = resource_find_any_free_pipe(new_res_ctx, pool); - return idle_pipe_idx; + return free_pipe_idx; } -struct pipe_ctx *dcn32_acquire_idle_pipe_for_layer( +struct pipe_ctx *dcn32_acquire_free_pipe_as_secondary_dpp_pipe( const struct dc_state *cur_ctx, struct dc_state *new_ctx, const struct resource_pool *pool, const struct pipe_ctx *opp_head_pipe) { - int idle_pipe_idx = - find_optimal_idle_pipe_as_secondary_dpp_pipe( + int free_pipe_idx = + find_optimal_free_pipe_as_secondary_dpp_pipe( &cur_ctx->res_ctx, &new_ctx->res_ctx, pool, opp_head_pipe); - struct pipe_ctx *idle_pipe; - - if (idle_pipe_idx >= 0) { - idle_pipe = &new_ctx->res_ctx.pipe_ctx[idle_pipe_idx]; - idle_pipe->pipe_idx = idle_pipe_idx; - idle_pipe->stream = opp_head_pipe->stream; - idle_pipe->stream_res.tg = opp_head_pipe->stream_res.tg; - idle_pipe->stream_res.opp = opp_head_pipe->stream_res.opp; - - idle_pipe->plane_res.hubp = pool->hubps[idle_pipe->pipe_idx]; - idle_pipe->plane_res.ipp = pool->ipps[idle_pipe->pipe_idx]; - idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; - idle_pipe->plane_res.mpcc_inst = - pool->dpps[idle_pipe->pipe_idx]->inst; + struct pipe_ctx *free_pipe; + + if (free_pipe_idx >= 0) { + free_pipe = &new_ctx->res_ctx.pipe_ctx[free_pipe_idx]; + free_pipe->pipe_idx = free_pipe_idx; + free_pipe->stream = opp_head_pipe->stream; + free_pipe->stream_res.tg = opp_head_pipe->stream_res.tg; + free_pipe->stream_res.opp = opp_head_pipe->stream_res.opp; + + free_pipe->plane_res.hubp = pool->hubps[free_pipe->pipe_idx]; + free_pipe->plane_res.ipp = pool->ipps[free_pipe->pipe_idx]; + free_pipe->plane_res.dpp = pool->dpps[free_pipe->pipe_idx]; + free_pipe->plane_res.mpcc_inst = + pool->dpps[free_pipe->pipe_idx]->inst; } else { ASSERT(opp_head_pipe); - idle_pipe = NULL; + free_pipe = NULL; } - return idle_pipe; + return free_pipe; } unsigned int dcn32_calc_num_avail_chans_for_mall(struct dc *dc, int num_chans) diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.h b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.h index 165754ed5f49..103a2b54d025 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.h +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.h @@ -136,7 +136,7 @@ bool dcn32_any_surfaces_rotated(struct dc *dc, struct dc_state *context); bool dcn32_is_center_timing(struct pipe_ctx *pipe); bool dcn32_is_psr_capable(struct pipe_ctx *pipe); -struct pipe_ctx *dcn32_acquire_idle_pipe_for_layer( +struct pipe_ctx *dcn32_acquire_free_pipe_as_secondary_dpp_pipe( const struct dc_state *cur_ctx, struct dc_state *new_ctx, const struct resource_pool *pool, diff --git a/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c b/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c index c2fd841d4c0b..8d73cceb485b 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c @@ -1588,7 +1588,7 @@ static struct resource_funcs dcn321_res_pool_funcs = { .validate_bandwidth = dcn32_validate_bandwidth, .calculate_wm_and_dlg = dcn32_calculate_wm_and_dlg, .populate_dml_pipes = dcn32_populate_dml_pipes_from_context, - .acquire_idle_pipe_for_layer = dcn32_acquire_idle_pipe_for_layer, + .acquire_free_pipe_as_secondary_dpp_pipe = dcn32_acquire_free_pipe_as_secondary_dpp_pipe, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, diff --git a/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c index 8377a0b58ec3..794d6517e511 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c @@ -1258,7 +1258,7 @@ bool dcn_validate_bandwidth( hsplit_pipe->pipe_dlg_param.vblank_end = pipe->pipe_dlg_param.vblank_end; } else { /* pipe not split previously needs split */ - hsplit_pipe = find_idle_secondary_pipe_legacy(&context->res_ctx, pool, pipe); + hsplit_pipe = find_free_secondary_pipe_legacy(&context->res_ctx, pool, pipe); ASSERT(hsplit_pipe); split_stream_across_pipes(&context->res_ctx, pool, pipe, hsplit_pipe); } diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h index 5b9d0bb0328c..027aec70c070 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h @@ -125,17 +125,7 @@ struct resource_funcs { struct dc *dc, struct dc_state *context); - /* - * Acquire an idle pipe from context, which could be used as a secondary - * pipe for the otg master pipe associated with the input stream. - * - * an idle pipe - a pipe not yet used for any streams or - * planes. - * secondary pipe - a pipe gets inserted to a head OPP pipe's blending - * tree. This is typical used for rendering MPO planes or additional - * offset areas in MPCC combine. - */ - struct pipe_ctx *(*acquire_idle_pipe_for_layer)( + struct pipe_ctx *(*acquire_free_pipe_as_secondary_dpp_pipe)( const struct dc_state *cur_ctx, struct dc_state *new_ctx, const struct resource_pool *pool, diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h index c518ee8b1a03..8dabbbc2a7b9 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/resource.h +++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h @@ -37,7 +37,7 @@ #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0) #define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F) #define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd)) -#define IDLE_PIPE_INDEX_NOT_FOUND -1 +#define FREE_PIPE_INDEX_NOT_FOUND -1 enum dce_version resource_parse_asic_id( struct hw_asic_id asic_id); @@ -154,27 +154,27 @@ bool resource_attach_surfaces_to_context( struct dc_state *context, const struct resource_pool *pool); -struct pipe_ctx *find_idle_secondary_pipe_legacy( +struct pipe_ctx *find_free_secondary_pipe_legacy( struct resource_context *res_ctx, const struct resource_pool *pool, const struct pipe_ctx *primary_pipe); -int resource_find_idle_pipe_used_in_cur_mpc_blending_tree( +int resource_find_free_pipe_used_in_cur_mpc_blending_tree( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct pipe_ctx *cur_opp_head); -int recource_find_idle_pipe_not_used_in_cur_res_ctx( +int recource_find_free_pipe_not_used_in_cur_res_ctx( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct resource_pool *pool); -int resource_find_idle_pipe_used_as_cur_sec_dpp_in_mpcc_combine( +int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct resource_pool *pool); -int resource_find_any_idle_pipe(struct resource_context *new_res_ctx, +int resource_find_any_free_pipe(struct resource_context *new_res_ctx, const struct resource_pool *pool); bool resource_validate_attach_surfaces( |