diff options
| -rw-r--r-- | Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stih410-b2260.dts | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stih410.dtsi | 34 |
3 files changed, 39 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml index abd4aa335fbc..9318817ea135 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml @@ -33,6 +33,7 @@ properties: - rockchip,rk3188-mali - rockchip,rk3228-mali - samsung,exynos4210-mali + - st,stih410-mali - stericsson,db8500-mali - xlnx,zynqmp-mali - const: arm,mali-400 diff --git a/arch/arm/boot/dts/st/stih410-b2260.dts b/arch/arm/boot/dts/st/stih410-b2260.dts index 240b62040000..736b1e059b0a 100644 --- a/arch/arm/boot/dts/st/stih410-b2260.dts +++ b/arch/arm/boot/dts/st/stih410-b2260.dts @@ -206,5 +206,9 @@ sata1: sata@9b28000 { status = "okay"; }; + + gpu: gpu@9f00000 { + status = "okay"; + }; }; }; diff --git a/arch/arm/boot/dts/st/stih410.dtsi b/arch/arm/boot/dts/st/stih410.dtsi index a69231854f78..d56343f44fda 100644 --- a/arch/arm/boot/dts/st/stih410.dtsi +++ b/arch/arm/boot/dts/st/stih410.dtsi @@ -285,5 +285,39 @@ resets = <&softreset STIH407_LPM_SOFTRESET>; hdmi-phandle = <&sti_hdmi>; }; + + gpu: gpu@9f00000 { + compatible = "st,stih410-mali", "arm,mali-400"; + reg = <0x9f00000 0x10000>; + /* LIMA driver needs 2 clocks, use the same for both */ + clocks = <&clk_s_c0_flexgen CLK_ICN_GPU>, + <&clk_s_c0_flexgen CLK_ICN_GPU>; + clock-names = "bus", "core"; + assigned-clocks = <&clk_s_c0_flexgen CLK_ICN_GPU>; + assigned-clock-rates = <400000000>; + resets = <&softreset STIH407_GPU_SOFTRESET>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gp", + "gpmmu", + "pp0", + "ppmmu0", + "pp1", + "ppmmu1", + "pp2", + "ppmmu2", + "pp3", + "ppmmu3"; + + status = "disabled"; + }; }; }; |