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| -rw-r--r-- | Documentation/devicetree/bindings/riscv/extensions.yaml | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 6a4697b36b8d..beeb6612db31 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -109,6 +109,13 @@ properties: The standard C extension for compressed instructions, as ratified in the 20191213 version of the unprivileged ISA specification. + - const: b + description: + The standard B extension for bit manipulation instructions, as + ratified in the 20240411 version of the unprivileged ISA + specification. The B standard extension comprises instructions + provided by the Zba, Zbb, and Zbs extensions. + - const: v description: The standard V extension for vector operations, as ratified @@ -738,6 +745,30 @@ properties: then: contains: const: f + # B comprises Zba, Zbb, and Zbs + - if: + contains: + const: b + then: + allOf: + - contains: + const: zba + - contains: + const: zbb + - contains: + const: zbs + # Zba, Zbb, Zbs together require B + - if: + allOf: + - contains: + const: zba + - contains: + const: zbb + - contains: + const: zbs + then: + contains: + const: b # Zcb depends on Zca - if: contains: |