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authorLeo Yan <leo.yan@arm.com>2025-12-12 20:25:00 +0300
committerArnaldo Carvalho de Melo <acme@redhat.com>2026-01-20 23:31:28 +0300
commitdc7fb075f7de33ee78a2133598215af6a87d7ab3 (patch)
tree27f64326448b3587daeabf2eea70da0bf5fec3ec /tools
parente524dda49340cb973c95fdfd6aa700eeb67aa128 (diff)
downloadlinux-dc7fb075f7de33ee78a2133598215af6a87d7ab3.tar.xz
perf c2c: Update documentation for adding memory event table
Users may occasionally need to see which options are applied to memory events. This helps to understand the behavior of "perf c2c" and "perf mem", and provides guidance for configuring memory event options directly. Add a table to track memory events and their corresponding options, and include the Arm SPE events in it. Suggested-by: Al Grant <al.grant@arm.com> Reviewed-by: James Clark <james.clark@linaro.org> Signed-off-by: Leo Yan <leo.yan@arm.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Will Deacon <will@kernel.org> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools')
-rw-r--r--tools/perf/Documentation/perf-c2c.txt51
1 files changed, 37 insertions, 14 deletions
diff --git a/tools/perf/Documentation/perf-c2c.txt b/tools/perf/Documentation/perf-c2c.txt
index 40b0f71a2c44..e57a122b8719 100644
--- a/tools/perf/Documentation/perf-c2c.txt
+++ b/tools/perf/Documentation/perf-c2c.txt
@@ -160,20 +160,43 @@ Following perf record options are configured by default:
-W,-d,--phys-data,--sample-cpu
-Unless specified otherwise with '-e' option, following events are monitored by
-default on Intel:
-
- cpu/mem-loads,ldlat=30/P
- cpu/mem-stores/P
-
-following on AMD:
-
- ibs_op//
-
-and following on PowerPC:
-
- cpu/mem-loads/
- cpu/mem-stores/
+The following table lists the events monitored on different architectures.
+Unless specified otherwise with the -e option, the tool will select the
+default events.
+
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | Arch | Configuration | Options | Events |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | Intel | Default | -e ldlat-loads | cpu/mem-loads,ldlat=30/P |
+ | | | -e ldlat-stores | cpu/mem-stores/P |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Load only | -e ldlat-loads | cpu/mem-loads,ldlat=30/P |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Store only | -e ldlat-stores | cpu/mem-stores/P |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | Intel | Default | -e ldlat-loads | {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=30/}:P |
+ | with | | -e ldlat-stores | cpu/mem-stores/P |
+ | AUX |--------------+------------------+--------------------------------------------------------------------------------+
+ | | Load only | -e ldlat-loads | {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=30/}:P |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Store only | -e ldlat-stores | cpu/mem-stores/P |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | AMD | Default | -e mem-ldst | ibs_op// (without latency support) |
+ | | | | ibs_op/ldlat=30/ (with latency support) |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | PowerPC| Default | -e ldlat-loads | cpu/mem-loads/ |
+ | | | -e ldlat-stores | cpu/mem-stores/ |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Load only | -e ldlat-loads | cpu/mem-loads/ |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Store only | -e ldlat-stores | cpu/mem-stores/ |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | Arm | Default | -e spe-ldst | arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=1,min_latency=30/ |
+ | SPE |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Load only | -e spe-load | arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,min_latency=30/ |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Store only | -e spe-store | arm_spe_0/ts_enable=1,pa_enable=1,store_filter=1/ |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
User can pass any 'perf record' option behind '--' mark, like (to enable
callchains and system wide monitoring):