diff options
author | Zhengjun Xing <zhengjun.xing@linux.intel.com> | 2022-08-12 11:52:39 +0300 |
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committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2022-08-13 21:08:31 +0300 |
commit | aa0d6e9cc23e996b484725d0a31906809862d678 (patch) | |
tree | fc620cb3e7ea2ab5ae82e0ddda694833cd0ac5a4 /tools | |
parent | ce87616d0dff3a9b80158bb9a9f6c20c1a88b378 (diff) | |
download | linux-aa0d6e9cc23e996b484725d0a31906809862d678.tar.xz |
perf vendor events: Update events for snowridgex
Update the events to v1.20, update events for snowridgex by the latest
event converter tools.
Use script at:
https://github.com/intel/event-converter-for-linux-perf/blob/master/download_and_gen.py
to download and generate the latest events and metrics. Manually copy
the snowridgex files into perf.
Signed-off-by: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Tested-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220812085239.3089231-12-zhengjun.xing@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools')
-rw-r--r-- | tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json | 111 |
1 files changed, 27 insertions, 84 deletions
diff --git a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json b/tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json index 4750b3806a51..1701db46696d 100644 --- a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json @@ -132,23 +132,22 @@ "Unit": "CHA" }, { - "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.ia_miss", + "BriefDescription": "TOR Inserts : All requests from iA Cores that Missed the LLC", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", - "EventName": "LLC_MISSES.UNCACHEABLE", - "Filter": "config1=0x40e33", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", "PerPkg": "1", "UMask": "0xC001FE01", "UMaskExt": "0xC001FE", "Unit": "CHA" }, { - "BriefDescription": "LLC misses - Uncacheable reads (from cpu) ", + "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.ia_miss", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", + "EventName": "LLC_MISSES.UNCACHEABLE", "Filter": "config1=0x40e33", "PerPkg": "1", "UMask": "0xC001FE01", @@ -168,18 +167,6 @@ "Unit": "CHA" }, { - "BriefDescription": "MMIO reads", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", - "Filter": "config1=0x40040e33", - "PerPkg": "1", - "UMask": "0xC001FE01", - "UMaskExt": "0xC001FE", - "Unit": "CHA" - }, - { "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts.ia_miss", "Counter": "0,1,2,3", "CounterType": "PGMABLE", @@ -192,18 +179,6 @@ "Unit": "CHA" }, { - "BriefDescription": "MMIO writes", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", - "Filter": "config1=0x40041e33", - "PerPkg": "1", - "UMask": "0xC001FE01", - "UMaskExt": "0xC001FE", - "Unit": "CHA" - }, - { "BriefDescription": "Streaming stores (full cache line). Derived from unc_cha_tor_inserts.ia_miss", "Counter": "0,1,2,3", "CounterType": "PGMABLE", @@ -217,19 +192,6 @@ "Unit": "CHA" }, { - "BriefDescription": "Streaming stores (full cache line)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", - "Filter": "config1=0x41833", - "PerPkg": "1", - "ScaleUnit": "64Bytes", - "UMask": "0xC001FE01", - "UMaskExt": "0xC001FE", - "Unit": "CHA" - }, - { "BriefDescription": "Streaming stores (partial cache line). Derived from unc_cha_tor_inserts.ia_miss", "Counter": "0,1,2,3", "CounterType": "PGMABLE", @@ -243,19 +205,6 @@ "Unit": "CHA" }, { - "BriefDescription": "Streaming stores (partial cache line)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", - "Filter": "config1=0x41a33", - "PerPkg": "1", - "ScaleUnit": "64Bytes", - "UMask": "0xC001FE01", - "UMaskExt": "0xC001FE", - "Unit": "CHA" - }, - { "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Missed the LLC", "Counter": "0,1,2,3", "CounterType": "PGMABLE", @@ -829,31 +778,12 @@ "Unit": "IIO" }, { - "BriefDescription": "PCI Express bandwidth writing at IIO. Derived from unc_iio_data_req_of_cpu.mem_write.part0", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "LLC_MISSES.PCIE_WRITE", - "FCMask": "0x07", - "Filter": "ch_mask=0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "MetricName": "LLC_MISSES.PCIE_WRITE", - "PerPkg": "1", - "PortMask": "0x01", - "ScaleUnit": "4Bytes", - "UMask": "0x01", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO", + "BriefDescription": "PCI Express bandwidth writing at IIO, part 0", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", "FCMask": "0x07", - "Filter": "ch_mask=0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "MetricName": "LLC_MISSES.PCIE_WRITE", "PerPkg": "1", "PortMask": "0x01", "ScaleUnit": "4Bytes", @@ -900,31 +830,28 @@ "Unit": "IIO" }, { - "BriefDescription": "PCI Express bandwidth reading at IIO. Derived from unc_iio_data_req_of_cpu.mem_read.part0", + "BriefDescription": "PCI Express bandwidth writing at IIO. Derived from unc_iio_data_req_of_cpu.mem_write.part0", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", - "EventName": "LLC_MISSES.PCIE_READ", + "EventName": "LLC_MISSES.PCIE_WRITE", "FCMask": "0x07", "Filter": "ch_mask=0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "MetricName": "LLC_MISSES.PCIE_READ", + "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "MetricName": "LLC_MISSES.PCIE_WRITE", "PerPkg": "1", "PortMask": "0x01", "ScaleUnit": "4Bytes", - "UMask": "0x04", + "UMask": "0x01", "Unit": "IIO" }, { - "BriefDescription": "PCI Express bandwidth reading at IIO", + "BriefDescription": "PCI Express bandwidth reading at IIO, part 0", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", "FCMask": "0x07", - "Filter": "ch_mask=0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "MetricName": "LLC_MISSES.PCIE_READ", "PerPkg": "1", "PortMask": "0x01", "ScaleUnit": "4Bytes", @@ -971,6 +898,22 @@ "Unit": "IIO" }, { + "BriefDescription": "PCI Express bandwidth reading at IIO. Derived from unc_iio_data_req_of_cpu.mem_read.part0", + "Counter": "0,1", + "CounterType": "PGMABLE", + "EventCode": "0x83", + "EventName": "LLC_MISSES.PCIE_READ", + "FCMask": "0x07", + "Filter": "ch_mask=0x1f", + "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "MetricName": "LLC_MISSES.PCIE_READ", + "PerPkg": "1", + "PortMask": "0x01", + "ScaleUnit": "4Bytes", + "UMask": "0x04", + "Unit": "IIO" + }, + { "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", "Counter": "0,1", "CounterType": "PGMABLE", |