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| author | Dave Jiang <dave.jiang@intel.com> | 2026-04-03 22:18:23 +0300 |
|---|---|---|
| committer | Dave Jiang <dave.jiang@intel.com> | 2026-04-03 22:18:23 +0300 |
| commit | 7aacc625576d4dc9c7d8a687f168ff72b30ca353 (patch) | |
| tree | 4ca6d40a9f9f165362275dc80cea9cfedb6dfe9f /tools | |
| parent | 2fb3bdeb00111519965601389a7b60afb97bafc0 (diff) | |
| parent | 64584273dfb8a1e5fc7d78094ba22a93c204b44e (diff) | |
| download | linux-7aacc625576d4dc9c7d8a687f168ff72b30ca353.tar.xz | |
Merge branch 'for-7.1/cxl-type2-support' into cxl-for-next
Prep patches for CXL type2 accelerator basic support
cxl/region: Factor out interleave granularity setup
cxl/region: Factor out interleave ways setup
cxl: Make region type based on endpoint type
cxl/pci: Remove redundant cxl_pci_find_port() call
cxl: Move pci generic code from cxl_pci to core/cxl_pci
cxl: export internal structs for external Type2 drivers
cxl: support Type2 when initializing cxl_dev_state
Diffstat (limited to 'tools')
| -rw-r--r-- | tools/testing/cxl/test/mem.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c index cb87e8c0e63c..79f42f4474d4 100644 --- a/tools/testing/cxl/test/mem.c +++ b/tools/testing/cxl/test/mem.c @@ -1716,7 +1716,7 @@ static int cxl_mock_mem_probe(struct platform_device *pdev) if (rc) return rc; - mds = cxl_memdev_state_create(dev); + mds = cxl_memdev_state_create(dev, pdev->id + 1, 0); if (IS_ERR(mds)) return PTR_ERR(mds); @@ -1732,7 +1732,6 @@ static int cxl_mock_mem_probe(struct platform_device *pdev) mds->event.buf = (struct cxl_get_event_payload *) mdata->event_buf; INIT_DELAYED_WORK(&mds->security.poll_dwork, cxl_mockmem_sanitize_work); - cxlds->serial = pdev->id + 1; if (is_rcd(pdev)) cxlds->rcd = true; |