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| author | Dave Jiang <dave.jiang@intel.com> | 2026-01-24 00:13:16 +0300 |
|---|---|---|
| committer | Dave Jiang <dave.jiang@intel.com> | 2026-01-24 00:13:16 +0300 |
| commit | 3f7938b1aec7f06d5b23adca83e4542fcf027001 (patch) | |
| tree | 605f16cebb3c737fcd6ccd29669ad922489ee9b9 /tools/testing | |
| parent | 914c743509d56067eeeb2b5e341a44a68ef8377d (diff) | |
| parent | bc62f5b308cbdedf29132fe96e9d591e526527e1 (diff) | |
| download | linux-3f7938b1aec7f06d5b23adca83e4542fcf027001.tar.xz | |
Merge branch 'for-7.0/cxl-init' into cxl-for-next
Merge in patches to support several patch series such as Soft Reserve
handling, type2 accelerator enabling, and LSA 2.1 labeling support.
Mainly addition of cxl_memdev_attach() to allow the memdev probe
to make a decision of proceed/fail depending success of CXL topology
enumeration.
dax/hmem, e820, resource: Defer Soft Reserved insertion until hmem is ready
cxl/mem: Introduce cxl_memdev_attach for CXL-dependent operation
cxl/mem: Drop @host argument to devm_cxl_add_memdev()
cxl/mem: Convert devm_cxl_add_memdev() to scope-based-cleanup
cxl/port: Arrange for always synchronous endpoint attach
cxl/mem: Arrange for always-synchronous memdev attach
cxl/mem: Fix devm_cxl_memdev_edac_release() confusion
Diffstat (limited to 'tools/testing')
| -rw-r--r-- | tools/testing/cxl/test/mem.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c index 176dcde570cd..cb87e8c0e63c 100644 --- a/tools/testing/cxl/test/mem.c +++ b/tools/testing/cxl/test/mem.c @@ -1767,7 +1767,7 @@ static int cxl_mock_mem_probe(struct platform_device *pdev) cxl_mock_add_event_logs(&mdata->mes); - cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlds); + cxlmd = devm_cxl_add_memdev(cxlds, NULL); if (IS_ERR(cxlmd)) return PTR_ERR(cxlmd); |