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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-09-04 12:32:33 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-09-04 12:32:33 +0300 |
| commit | a47f311d6f8265d2340110bd5fe4a1dc41f95e9c (patch) | |
| tree | e1e02104623850f405c7f190df28841f0317c53c /tools/testing/selftests/net/lib/py/ynl.py | |
| parent | 08eea73dcf608ac7c794550a0ac7303c1ef1f68a (diff) | |
| parent | 0dcfb6fcdd085bbfcdfdcf64a7d4a75c63c108af (diff) | |
| download | linux-a47f311d6f8265d2340110bd5fe4a1dc41f95e9c.tar.xz | |
Merge tag 'renesas-r9a09g077-dt-binding-defs-tag4' into renesas-clk-for-v6.18
Renesas RZ/T2H and RZ/N2H Ethernet Clock DT Binding Definitions
Ethernet Clock DT binding definitions for the Renesas RZ/T2H (R9A09G077)
and RZ/N2H (R9A09G087) SoCs, shared by driver and DT source files.
Diffstat (limited to 'tools/testing/selftests/net/lib/py/ynl.py')
0 files changed, 0 insertions, 0 deletions