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| author | Andy-ld Lu <andy-ld.lu@mediatek.com> | 2025-01-23 12:26:01 +0300 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2025-02-03 15:34:50 +0300 |
| commit | 3e68abf2b9cebe76c6cd4b1aca8e95cd671035a3 (patch) | |
| tree | 66476dbea55276e1d22b3931d3b22c41f1fd95cb /tools/testing/selftests/bpf/prog_tests/prog_array_init.c | |
| parent | ac5a41b472b4ef8bb37d7550796d059b377b4646 (diff) | |
| download | linux-3e68abf2b9cebe76c6cd4b1aca8e95cd671035a3.tar.xz | |
mmc: mtk-sd: Fix register settings for hs400(es) mode
For hs400(es) mode, the 'hs400-ds-delay' is typically configured in the
dts. However, some projects may only define 'mediatek,hs400-ds-dly3',
which can lead to initialization failures in hs400es mode. CMD13 reported
response crc error in the mmc_switch_status() just after switching to
hs400es mode.
[ 1.914038][ T82] mmc0: mmc_select_hs400es failed, error -84
[ 1.914954][ T82] mmc0: error -84 whilst initialising MMC card
Currently, the hs400_ds_dly3 value is set within the tuning function. This
means that the PAD_DS_DLY3 field is not configured before tuning process,
which is the reason for the above-mentioned CMD13 response crc error.
Move the PAD_DS_DLY3 field configuration into msdc_prepare_hs400_tuning(),
and add a value check of hs400_ds_delay to prevent overwriting by zero when
the 'hs400-ds-delay' is not set in the dts. In addition, since hs400(es)
only tune the PAD_DS_DLY1, the PAD_DS_DLY2_SEL bit should be cleared to
bypass it.
Fixes: c4ac38c6539b ("mmc: mtk-sd: Add HS400 online tuning support")
Signed-off-by: Andy-ld Lu <andy-ld.lu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20250123092644.7359-1-andy-ld.lu@mediatek.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'tools/testing/selftests/bpf/prog_tests/prog_array_init.c')
0 files changed, 0 insertions, 0 deletions