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authorAndi Kleen <ak@linux.intel.com>2016-10-07 16:42:26 +0300
committerArnaldo Carvalho de Melo <acme@redhat.com>2016-10-24 16:31:32 +0300
commitfaaa87680b25d9ec91a308d4c957f5b9305c7b59 (patch)
treee95dcf6e9a7de1be184512674152bbc4263adb90 /tools/perf/util/event.h
parent32f98aab75dd385e326c975717f8b730c6c57508 (diff)
downloadlinux-faaa87680b25d9ec91a308d4c957f5b9305c7b59.tar.xz
perf intel-pt/bts: Report instruction bytes and length in sample
Change Intel PT and BTS to pass up the length and the instruction bytes of the decoded or sampled instruction in the perf sample. The decoder already knows this information, we just need to pass it up. Since it is only a couple of movs it is not very expensive. Handle instruction cache too. Make sure ilen is always initialized. Used in the next patch. [Adrian: re-base on top (and adjust for) instruction buffer size tidy-up] [Adrian: add BTS support and adjust commit message accordingly] Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Link: http://lkml.kernel.org/r/1475847747-30994-3-git-send-email-adrian.hunter@intel.com Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf/util/event.h')
-rw-r--r--tools/perf/util/event.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/tools/perf/util/event.h b/tools/perf/util/event.h
index 8d363d5e65a2..c735c53a26f8 100644
--- a/tools/perf/util/event.h
+++ b/tools/perf/util/event.h
@@ -177,6 +177,8 @@ enum {
PERF_IP_FLAG_TRACE_BEGIN |\
PERF_IP_FLAG_TRACE_END)
+#define MAX_INSN 16
+
struct perf_sample {
u64 ip;
u32 pid, tid;
@@ -193,6 +195,7 @@ struct perf_sample {
u32 flags;
u16 insn_len;
u8 cpumode;
+ char insn[MAX_INSN];
void *raw_data;
struct ip_callchain *callchain;
struct branch_stack *branch_stack;