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| author | Stephen Boyd <sboyd@codeaurora.org> | 2016-02-09 01:01:10 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-02-09 01:01:10 +0300 |
| commit | f2626ba96543c21a46228aa0d7dc20b70b8f7d36 (patch) | |
| tree | c2872884b444d673d15351a3715c341ab43948e9 /tools/perf/scripts/python | |
| parent | 1e42754eacdb1c8632c3af47263c56967e04cbd1 (diff) | |
| parent | 0e954fea5be056d13945a124bdf2b7e358d1554d (diff) | |
| download | linux-f2626ba96543c21a46228aa0d7dc20b70b8f7d36.tar.xz | |
Merge branch 'clk-fixes' into clk-next
* clk-fixes:
clk: tegra: super: Fix sparse warnings for functions not declared as static
clk: tegra: Fix sparse warnings for functions not declared as static
clk: tegra: Fix sparse warning for pll_m
clk: tegra: Use definition for pll_u override bit
clk: tegra: Fix warning caused by pll_u failing to lock
clk: tegra: Fix clock sources for Tegra210 EMC
clk: tegra: Add the APB2APE audio clock on Tegra210
clk: tegra: Add missing of_node_put()
clk: tegra: Fix PLLE SS coefficients
clk: tegra: Fix typos around clearing PLLE bits during enable
clk: tegra: Do not disable PLLE when under hardware control
clk: tegra: Fix pllx dyn step calculation
clk: tegra: pll: Fix potential sleeping-while-atomic
clk: tegra: Fix the misnaming of nvenc from msenc
clk: tegra: Fix naming of MISC registers
clk: tegra: Remove improper flags for lock_enable
clk: tegra: Fix divider on VI_I2C
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions