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| author | Giulio Benetti <giulio.benetti@micronovasrl.com> | 2018-02-28 19:46:53 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-03-01 12:41:27 +0300 |
| commit | e64b6afa98f3629d0c0c46233bbdbe8acdb56f06 (patch) | |
| tree | c3a92ee1cb2e64f09ab710b02b8d3d6ad08f55c4 /tools/perf/scripts/python | |
| parent | 9a191b114906457c4b2494c474f58ae4142d4e67 (diff) | |
| download | linux-e64b6afa98f3629d0c0c46233bbdbe8acdb56f06.tar.xz | |
drm/sun4i: Fix dclk_set_phase
Phase value is not shifted before writing.
Shift left of 28 bits to fit right bits
Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1519836413-35023-1-git-send-email-giulio.benetti@micronovasrl.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions