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authorJagan Teki <jagan@amarulasolutions.com>2023-03-08 19:39:44 +0300
committerInki Dae <inki.dae@samsung.com>2023-03-28 03:05:40 +0300
commit88576e23885e0d3b40177b6bad6fe7e3007e41ea (patch)
tree6f6a8600874ce88d845eb2ca296fc4ccfce74082 /tools/perf/scripts/python
parentbb57453d6aec9217ad516f97b08ba1622a674a64 (diff)
downloadlinux-88576e23885e0d3b40177b6bad6fe7e3007e41ea.tar.xz
drm: exynos: dsi: Add atomic check
Look like an explicit fixing up of mode_flags is required for DSIM IP present in i.MX8M Mini/Nano SoCs. At least the LCDIF + DSIM needs active low sync polarities in order to correlate the correct sync flags of the surrounding components in the chain to make sure the whole pipeline can work properly. On the other hand the i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 says. "13.6.3.5.2 RGB interface Vsync, Hsync, and VDEN are active high signals." i.MX 8M Mini Applications Processor Reference Manual Rev. 3, 11/2020 3.6.3.5.2 RGB interface i.MX 8M Nano Applications Processor Reference Manual Rev. 2, 07/2022 13.6.2.7.2 RGB interface both claim "Vsync, Hsync, and VDEN are active high signals.", the LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW. No clear evidence about whether it can be documentation issues or something, so added proper comments on the code. Comments are suggested by Marek Vasut. Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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