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authorThierry Reding <treding@nvidia.com>2015-05-04 17:44:29 +0300
committerThierry Reding <treding@nvidia.com>2015-07-16 11:38:31 +0300
commit82df0e5e78d956ea3552f7315a4d559f657047da (patch)
treeb01c7e1679e07578760b810bb91bc03b4503f93a /tools/perf/scripts/python
parentb23083a9c6829675d367b4f06a64d74ead82eb14 (diff)
downloadlinux-82df0e5e78d956ea3552f7315a4d559f657047da.tar.xz
soc/tegra: fuse: Add spare bit offset for Tegra124
The offset of the first spare bit register on Tegra124 is 0x300, but account for the fixed offset of 0x100 in the fuse accessor. Signed-off-by: Thierry Reding <treding@nvidia.com>
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