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author | Ricardo Neri <ricardo.neri-calderon@linux.intel.com> | 2024-06-15 00:16:05 +0300 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2024-06-21 15:52:12 +0300 |
commit | 6ae0092ca7adfce79336c6525cb0da561ecd4f04 (patch) | |
tree | c6c8dc69d7e09227f69c920f78cc5ce836701cf7 /tools/perf/scripts/python | |
parent | 73abe7002eea73fa4c006249e1adb9dee3a8c79f (diff) | |
download | linux-6ae0092ca7adfce79336c6525cb0da561ecd4f04.tar.xz |
thermal: intel: intel_tcc: Add model checks for temperature registers
The register MSR_TEMPERATURE_TARGET is not architectural. Its fields may be
defined differently for each processor model. TCC_OFFSET is an example of
such case.
Despite being specified as architectural, the registers IA32_[PACKAGE]_
THERM_STATUS have become model-specific: in recent processors, the
digital temperature readout uses bits [23:16] whereas the Intel Software
Developer's manual specifies bits [22:16].
Create an array of processor models and their bitmasks for TCC_OFFSET and
the digital temperature readout fields. Do not include recent processors.
Instead, use the bitmasks of these recent processors as default.
Use these model-specific bitmasks when reading TCC_OFFSET or the
temperature sensors.
Initialize a model-specific data structure during subsys_initcall() to
have it ready when thermal drivers are loaded.
Expose the new interface intel_tcc_get_offset_mask(). The
intel_tcc_cooling driver will use it.
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Link: https://patch.msgid.link/20240614211606.5896-2-ricardo.neri-calderon@linux.intel.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions