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author | Amelie Delaunay <amelie.delaunay@foss.st.com> | 2024-10-16 15:39:53 +0300 |
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committer | Vinod Koul <vkoul@kernel.org> | 2024-10-21 20:21:44 +0300 |
commit | 689f05586e7ea620c8fc1066c067809e52ffc2f3 (patch) | |
tree | b8c83e68037188846a42e425afda631287e91f1a /tools/perf/scripts/python | |
parent | 3e482e2840546a3ff725d5adf8d0779ac1c3cf4f (diff) | |
download | linux-689f05586e7ea620c8fc1066c067809e52ffc2f3.tar.xz |
dt-bindings: dma: stm32-dma3: prevent packing/unpacking mode
When source data width/burst and destination data width/burst are
different, data are packed or unpacked in DMA3 channel FIFO.
Data are pushed out from DMA3 channel FIFO when the destination burst
length (= data width * burst) is reached.
If the channel is stopped before the transfer end, and if some bytes are
packed/unpacked in the DMA3 channel FIFO, these bytes are lost.
Indeed, DMA3 channel FIFO has no flush capability, only reset.
To avoid potential bytes lost, pack/unpack must be prevented by setting
memory data width/burst equal to peripheral data width/burst.
Memory accesses will be penalized. But it is the only way to avoid bytes
lost.
Some devices (e.g. cyclic RX like UART) need this, so add the possibility
to prevent pack/unpack feature, by setting bit 16 of the 'DMA transfer
requirements' bit mask.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20241016-dma3-mp25-updates-v3-1-8311fe6f228d@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions