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| author | Jingyi Wang <quic_jingyw@quicinc.com> | 2024-12-03 12:27:13 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-12-26 21:30:52 +0300 |
| commit | 57039a27658a1e7ca1c60fe7e381092c609e4bc7 (patch) | |
| tree | cef73c4434ab12818d2732c7a68169cff59d983d /tools/perf/scripts/python | |
| parent | 8592294dfc7b46c7b964f453d64e90e6c1137090 (diff) | |
| download | linux-57039a27658a1e7ca1c60fe7e381092c609e4bc7.tar.xz | |
arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS8300
Enable clock controller, interconnect and pinctrl for Qualcomm
QCS8300 platform to boot QCS8300 RIDE board to UART console.
The serial engine depends on gcc, interconnect and pinctrl. Since
the serial console driver is only available as built-in, so these
configs needs be built-in for the UART device to probe and register
the console.
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/r/20241203-qcs8300_initial_dtsi-v4-2-d7c953484024@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions