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authorShengjiu Wang <shengjiu.wang@nxp.com>2023-09-19 12:42:13 +0300
committerMark Brown <broonie@kernel.org>2023-09-25 15:11:05 +0300
commit197c53c8ecb34f2cd5922f4bdcffa8f701a134eb (patch)
treeae670e2b785ed989b0aa76d0e50a95344bc77629 /tools/perf/scripts/python
parent5c8a033f5674ae62d5aa2ebbdb9980b89380c34f (diff)
downloadlinux-197c53c8ecb34f2cd5922f4bdcffa8f701a134eb.tar.xz
ASoC: fsl_sai: Don't disable bitclock for i.MX8MP
On i.MX8MP, the BCE and TERE bit are binding with mclk enablement, if BCE and TERE are cleared the MCLK also be disabled on output pin, that cause the external codec (wm8960) in wrong state. Codec (wm8960) is using the mclk to generate PLL clock, if mclk is disabled before disabling PLL, the codec (wm8960) won't generate bclk and frameclk when sysclk switch to MCLK source in next test case. The test case: $aplay -r44100 test1.wav (PLL source) $aplay -r48000 test2.wav (MCLK source) aplay: pcm_write:2127: write error: Input/output error Fixes: 269f399dc19f ("ASoC: fsl_sai: Disable bit clock with transmitter") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1695116533-23287-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
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