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| author | Tingwei Zhang <tingwei@codeaurora.org> | 2020-07-16 20:57:32 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-07-21 16:48:38 +0300 |
| commit | 02510a5aa78df45ff9a22def37e5c18677d4d659 (patch) | |
| tree | 21acdf5564448aedeedbde789f299ebce20fbdf2 /tools/perf/scripts/python | |
| parent | 9cfb556357d56895ae50f0f3c691730d640530d2 (diff) | |
| download | linux-02510a5aa78df45ff9a22def37e5c18677d4d659.tar.xz | |
coresight: etm4x: Add support to skip trace unit power up
On some Qualcomm Technologies Inc. SoCs like SC7180, there
exists a hardware errata where the APSS (Application Processor
SubSystem)/CPU watchdog counter is stopped when the trace unit
power up ETM register is set (TRCPDCR.PU = 1). Since the ETMs
share the same power domain as that of respective CPU cores,
they are powered on when the CPU core is powered on. So we can
skip powering up of trace unit after checking for this errata
via new property called "qcom,skip-power-up".
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
Co-developed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-4-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions