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authorGustavo Sousa <gustavo.sousa@intel.com>2025-03-28 19:50:50 +0300
committerLucas De Marchi <lucas.demarchi@intel.com>2025-03-31 19:46:13 +0300
commitbac016066536cc050046c20807ca8b650c55cc70 (patch)
treeea3633d59893c7fec0ceb185c336ef8698e99c9d /tools/perf/scripts/python/task-analyzer.py
parent61672806b579dd5a150a042ec9383be2bbc2ae7e (diff)
downloadlinux-bac016066536cc050046c20807ca8b650c55cc70.tar.xz
drm/xe: Make PPHWSP size explicit in xe_gt_lrc_size()
The context of each engine starts with a 4k memory space for the "Per-process HW status page" (PPHWSP). In xe_gt_lrc_size(), we have been implicitly accounting for that page in the switch statement on the engine class. Since the PPHWSP is common to all engines, let's extract that into it's own assignment. That makes the context structure more explicit in the code and aligns better with the descriptions in Bspec. Another advantage of keeping it separate is that now the sizes used in the switch statement match the sizes we calculate engine-specific context images, which have their own Bspec pages. Bspec: 67296, 60159, 45554 Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20250328-explicit-pphwsp-size-in-xe_gt_lrc_size-v1-1-ceb9ce7c8bc1@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
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