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| author | Dave Jiang <dave.jiang@intel.com> | 2023-02-14 22:41:19 +0300 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-02-15 02:45:21 +0300 |
| commit | 9de321e93c3b3fd7fd2621a2557c42fa7d43e314 (patch) | |
| tree | 47ec49f65ddd4d2cc234d5886bafaf632d41f326 /tools/perf/scripts/python/task-analyzer.py | |
| parent | 59c3368b2e69eb7da7f271286a0bd80930dfc070 (diff) | |
| download | linux-9de321e93c3b3fd7fd2621a2557c42fa7d43e314.tar.xz | |
cxl/pci: Refactor cxl_hdm_decode_init()
With the previous refactoring of DVSEC range registers out of
cxl_hdm_decode_init(), it basically becomes a skeleton function. Squash
__cxl_hdm_decode_init() with cxl_hdm_decode_init() to simplify the code.
cxl_hdm_decode_init() now returns more error codes than just -EBUSY.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/167640367916.935665.12898404758336059003.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions