diff options
author | Arnd Bergmann <arnd@arndb.de> | 2024-07-09 11:50:42 +0300 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2024-07-09 11:50:42 +0300 |
commit | 95ab7b209bd94ef5beea9419b8e8464788b28e75 (patch) | |
tree | 76c35e8572bccce7b7f42d02099af8ca01376e4b /tools/perf/scripts/python/task-analyzer.py | |
parent | ad828298af0bf87030539adbd79698da82a5d30e (diff) | |
parent | b1240a39511b9206293b82ac372c5114d6e15821 (diff) | |
download | linux-95ab7b209bd94ef5beea9419b8e8464788b28e75.tar.xz |
Merge tag 'riscv-sophgo-dt-for-v6.11' of https://github.com/sophgo/linux into soc/dt
RISC-V Devicetrees for v6.11
Sopgho:
Add clock support for SG2042.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* tag 'riscv-sophgo-dt-for-v6.11' of https://github.com/sophgo/linux:
riscv: dts: add clock generator for Sophgo SG2042 SoC
Link: https://lore.kernel.org/r/PN1P287MB281861EA2B1706B430D2FA3EFEDB2@PN1P287MB2818.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions