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author | Tudor Ambarus <tudor.ambarus@linaro.org> | 2023-03-28 13:15:14 +0300 |
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committer | Nicolas Ferre <nicolas.ferre@microchip.com> | 2023-03-30 22:20:59 +0300 |
commit | 417e58ea41abe4c7f8be22ab5034b5e11f952240 (patch) | |
tree | f00525fb3734f70717a2e84558827706378868a7 /tools/perf/scripts/python/task-analyzer.py | |
parent | fe15c26ee26efa11741a7b632e9f23b01aca4cc6 (diff) | |
download | linux-417e58ea41abe4c7f8be22ab5034b5e11f952240.tar.xz |
ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency
sama5d27-wlsom1 populates an sst26vf064b SPI NOR flash. Its maximum
operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated
at 3.3V, increase its maximum supported frequency to 104MHz. The
increasing of the spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.
The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.
With the increase of frequency the reads are now faster with ~37%.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-2-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
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