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| author | Ricardo Neri <ricardo.neri-calderon@linux.intel.com> | 2024-06-15 00:16:06 +0300 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2024-06-21 15:52:12 +0300 |
| commit | be6bfb29c55e48567983e24aba7b6bf9a66a45ab (patch) | |
| tree | 33b72ea937b21f239776f4f2552da5c8dd69e6b4 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 6ae0092ca7adfce79336c6525cb0da561ecd4f04 (diff) | |
| download | linux-be6bfb29c55e48567983e24aba7b6bf9a66a45ab.tar.xz | |
thermal: intel: intel_tcc_cooling: Use a model-specific bitmask for TCC offset
The TCC offset field in the register MSR_TEMPERATURE_TARGET is not
architectural. The TCC library provides a model-specific bitmask. Use it to
determine the maximum TCC offset.
Suggested-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Link: https://patch.msgid.link/20240614211606.5896-3-ricardo.neri-calderon@linux.intel.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions