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| author | Anton Blanchard <anton@samba.org> | 2017-09-07 20:11:12 +0300 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-01-21 21:48:36 +0300 |
| commit | b6d34eb4d280c893d0f442f4b9e039d73e3db420 (patch) | |
| tree | 5dec89635915a9a52d2b76d4a5888994181e7da3 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 8d81296cfcce89013a714feb8d25004a156f8181 (diff) | |
| download | linux-b6d34eb4d280c893d0f442f4b9e039d73e3db420.tar.xz | |
powerpc: Expose TSCR via sysfs
The thread switch control register (TSCR) is a per core register
that configures how the CPU shares resources between SMT threads.
Exposing it via sysfs allows us to tune it at run time.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions