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| author | Vince Bridgers <vbridger@opensource.altera.com> | 2015-02-12 19:47:33 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2015-02-19 23:23:42 +0300 |
| commit | a923fc730fdbbf079eadfe2b9a1644971bd95793 (patch) | |
| tree | dda5119ba0d2f3e2a9c0a724abc76518530ae6bf /tools/perf/scripts/python/syscall-counts.py | |
| parent | a53c4bf7f27f043564f5bdace12405c54265cb66 (diff) | |
| download | linux-a923fc730fdbbf079eadfe2b9a1644971bd95793.tar.xz | |
net: eth: altera: Change access ports to mdio for all xMII applications
Change use of Altera TSE's MDIO access from phy 0 registers to phy 1
registers. This allows support for GMII, MII, RGMII, and SGMII
designs where the external PHY is always accesible through
Altera TSE's MDIO phy 1 registers and Altera's PCS is accessible
through MDIO phy 0 registers for SGMII applications.
Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>
Tested-by: Kai Lin Ng <kailng@altera.com>
Tested-by: Dalon Westergreen <dwesterg@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions