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| author | Huacai Chen <chenhuacai@loongson.cn> | 2024-08-23 13:39:33 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2024-08-23 21:40:27 +0300 |
| commit | 843ed9317be1d0c3f4245418644fc7e55f465419 (patch) | |
| tree | 0f10a3773ae768b72e15e255ad503d933ac2cf66 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 06fac729a6d54e2c6650b38734f84383aafb3acc (diff) | |
| download | linux-843ed9317be1d0c3f4245418644fc7e55f465419.tar.xz | |
LoongArch: Architectural preparation for AVEC irqchip
Add architectural preparation for AVEC irqchip, including:
1. CPUCFG feature bits definition for AVEC;
2. Detection of AVEC irqchip in cpu_probe();
3. New IPI type definition (IPI_CLEAR_VECTOR) for AVEC;
4. Provide arch_probe_nr_irqs() for large NR_IRQS;
5. Other related changes about the number of interrupts.
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20240823103936.25092-2-zhangtianyang@loongson.cn
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions