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| author | Andre Przywara <andre.przywara@arm.com> | 2017-11-25 15:19:48 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2017-11-30 18:47:37 +0300 |
| commit | 6ad4cc8d1ac483e0fd33f605fb2788b0ecf51ed4 (patch) | |
| tree | f5e4a72c7deafe9425f12244d0d3a698361af1fe /tools/perf/scripts/python/syscall-counts.py | |
| parent | 793b9184047f3d7fe4fe234a46951dabfc3cfeeb (diff) | |
| download | linux-6ad4cc8d1ac483e0fd33f605fb2788b0ecf51ed4.tar.xz | |
pinctrl: sunxi: Fix A80 interrupt pin bank
On the A80 the pins on port B can trigger interrupts, and those are
assigned to the second interrupt bank.
Having two pins assigned to the same interrupt bank/pin combination does
not look healthy (instead more like a copy&paste bug from pins PA14-PA16),
so fix the interrupt bank for pins PB14-PB16, which is actually 1.
I don't have any A80 board, so could not test this.
Fixes: d5e9fb31baa2 ("pinctrl: sunxi: Add A80 pinctrl muxing options")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions