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| author | Jerome Brunet <jbrunet@baylibre.com> | 2018-05-22 19:34:53 +0300 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2018-07-09 14:47:22 +0300 |
| commit | 47f21315a6e4454ed9d8a450288a0989113e1e44 (patch) | |
| tree | b775418d62d71c4e8db42c6c1b2f82f32d611d8a /tools/perf/scripts/python/syscall-counts.py | |
| parent | a9387f70cd27a8ca82c2141ef33787868d5c8de9 (diff) | |
| download | linux-47f21315a6e4454ed9d8a450288a0989113e1e44.tar.xz | |
clk: meson: add clk-phase clock driver
Add a driver based meson clk-regmap to control clock phase on
amlogic SoCs
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions