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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-11-06 21:18:42 +0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-04-04 03:30:21 +0400 |
| commit | 45da7b0451b1fe15e882b08c79be58458cbe7a2f (patch) | |
| tree | 2ab0905104403822ec05c5f402e9e39cb720dd91 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 59871902703c47acc730555be41bd9cb36d3700c (diff) | |
| download | linux-45da7b0451b1fe15e882b08c79be58458cbe7a2f.tar.xz | |
dmaengine: omap-dma: use cached CCR value when enabling DMA
We don't need to read-modify-write the CCR register; we already know
what value it should contain at this point. Use the cached CCR value
when setting the enable bit.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions