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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-02-04 23:22:14 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-02-05 22:57:58 +0300 |
| commit | 108d14bdaef67617412af3f40256810281464425 (patch) | |
| tree | f4357482440674ea0e820291d03fbb70143413e4 /tools/perf/scripts/python/syscall-counts.py | |
| parent | d16221195ae255beae1fa62f961a9b8e020a6c22 (diff) | |
| download | linux-108d14bdaef67617412af3f40256810281464425.tar.xz | |
drm/i915: Setup PIPE_CHICKEN for fastsets too
Configure PIPE_CHICKEN during intel_update_pipe_config() to make
sure we have our chickens in a row with fastboot too.
v2: Apparently PIPE_CHICKEN is icl+ only
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190204202214.27051-1-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions