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author | Niklas Cassel <cassel@kernel.org> | 2024-12-03 09:38:54 +0300 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2025-01-21 18:44:14 +0300 |
commit | 0d292a1e6d90ff899342734d9ecfda59394daa42 (patch) | |
tree | fd2066caee762442559c8d8cfc04f1792bceb553 /tools/perf/scripts/python/syscall-counts.py | |
parent | 8a02612f85660e0e18e7ac59ef8ff8592b8e2d42 (diff) | |
download | linux-0d292a1e6d90ff899342734d9ecfda59394daa42.tar.xz |
misc: pci_endpoint_test: Add support for capabilities
The test BAR is on the EP side is allocated using pci_epf_alloc_space(),
which allocates the backing memory using dma_alloc_coherent(), which will
return zeroed memory regardless of __GFP_ZERO was set or not.
This means that running a new version of pci-endpoint-test.c (host side)
with an old version of pci-epf-test.c (EP side) will not see any
capabilities being set (as intended), so this is backwards compatible.
Additionally, the EP side always allocates at least 128 bytes for the test
BAR (excluding the MSI-X table), this means that adding another register at
offset 0x30 is still within the 128 available bytes.
For now, we only add the CAP_UNALIGNED_ACCESS capability.
If CAP_UNALIGNED_ACCESS is set, that means that the EP side supports
reading/writing to an address without any alignment requirements.
Thus, if CAP_UNALIGNED_ACCESS is set, make sure that the host side does
not add any extra padding to the buffers that we allocate (which was only
done in order to get the buffers to satisfy certain alignment requirements
by the endpoint controller).
Link: https://lore.kernel.org/r/20241203063851.695733-6-cassel@kernel.org
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Krzysztof WilczyĆski <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions