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| author | Anusha Srivatsa <anusha.srivatsa@intel.com> | 2018-11-02 07:14:54 +0300 |
|---|---|---|
| committer | Manasi Navare <manasi.d.navare@intel.com> | 2018-11-03 04:21:21 +0300 |
| commit | 08cadae8e1570c069f639a86fe4370485094552c (patch) | |
| tree | 2243f2f5683de8e17c4033e4838828d0383839ff /tools/perf/scripts/python/syscall-counts.py | |
| parent | 83b466b1dc5f0b4d33f0a901e8b00197a8f3582d (diff) | |
| download | linux-08cadae8e1570c069f639a86fe4370485094552c.tar.xz | |
i915/dp/fec: Cache the FEC_CAPABLE DPCD register
Similar to DSC DPCD registers, let us cache
FEC_CAPABLE register to avoid using stale
values. With this we can avoid aux reads
everytime and instead read the cached values.
v2: Avoid using memset and array for a single
field. (Manasi,Jani)
v3: Print FEC CAPABILITY value. (Manasi)
Suggested-by: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181102041455.15818-1-anusha.srivatsa@intel.com
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions