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authorShahar Shitrit <shshitrit@nvidia.com>2024-12-20 11:15:02 +0300
committerJakub Kicinski <kuba@kernel.org>2024-12-23 21:54:01 +0300
commit050a4c011b0dfeb91664a5d7bd3647ff38db08ce (patch)
treefe5c8bc95df338e50965230a17254c18f9f4ce0a /tools/perf/scripts/python/syscall-counts.py
parent75221e96101fa93390d3db5c23e026f5e3565d9b (diff)
downloadlinux-050a4c011b0dfeb91664a5d7bd3647ff38db08ce.tar.xz
net/mlx5: DR, select MSIX vector 0 for completion queue creation
When creating a software steering completion queue (CQ), an arbitrary MSIX vector n is selected. This results in the CQ sharing the same Ethernet traffic channel n associated with the chosen vector. However, the value of n is often unpredictable, which can introduce complications for interrupt monitoring and verification tools. Moreover, SW steering uses polling rather than event-driven interrupts. Therefore, there is no need to select any MSIX vector other than the existing vector 0 for CQ creation. In light of these factors, and to enhance predictability, we modify the code to consistently select MSIX vector 0 for CQ creation. Fixes: 297cccebdc5a ("net/mlx5: DR, Expose an internal API to issue RDMA operations") Signed-off-by: Shahar Shitrit <shshitrit@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20241220081505.1286093-2-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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