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| author | Jouni Högander <jouni.hogander@intel.com> | 2023-12-20 13:36:08 +0300 |
|---|---|---|
| committer | Jouni Högander <jouni.hogander@intel.com> | 2023-12-22 09:15:13 +0300 |
| commit | 16448cf437ea935b0b05ad4c5891b5bc430fa6ff (patch) | |
| tree | 11a2335b0e6a038133cb40a0afcd70b3826ad782 /tools/perf/scripts/python/stat-cpi.py | |
| parent | 6b6276138450617575f1a3176de3a9e289dfa3db (diff) | |
| download | linux-16448cf437ea935b0b05ad4c5891b5bc430fa6ff.tar.xz | |
drm/i915/display: Read PSR configuration before VSC SDP
VSC SDP sending is taken care by PSR HW and it's not enabled in
VIDEO_DIP_CTL when PSR is enabled. Readback of VSC SDP is depending on
VSC_SDP being set in intel_crtc_state->infoframes.enabled. In case of PSR
setting this flag is taken care by PSR code -> read back PSR configuration
before reading VSC SDP otherwise we get pipeconfig mismatch error.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Shawn Lee <shawn.c.lee@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231220103609.1384523-7-jouni.hogander@intel.com
Diffstat (limited to 'tools/perf/scripts/python/stat-cpi.py')
0 files changed, 0 insertions, 0 deletions