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| author | George Shen <george.shen@amd.com> | 2024-02-17 03:37:03 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-03-27 16:27:09 +0300 |
| commit | edfa93d87fc46913868481fe8ed3fb62c891ffb5 (patch) | |
| tree | a75dea2ac54f8d8527a787c2a80994cec7774f44 /tools/perf/scripts/python/stackcollapse.py | |
| parent | fe869c2e53484a29ab241667606240b91db920ef (diff) | |
| download | linux-edfa93d87fc46913868481fe8ed3fb62c891ffb5.tar.xz | |
drm/amd/display: Remove MPC rate control logic from DCN30 and above
[Why]
MPC flow rate control is not needed for DCN30 and above. Current logic
that uses it can result in underflow for certain edge cases (such as
DSC N422 + ODM combine + 422 left edge pixel).
[How]
Remove MPC flow rate control logic and programming for DCN30 and above.
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions