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| author | Maruthi Srinivas Bayyavarapu <Maruthi.Bayyavarapu@amd.com> | 2015-12-05 02:40:32 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-12-07 22:52:02 +0300 |
| commit | e164835a0270cc01c93794536027cc70cd00d0ff (patch) | |
| tree | 013e6b1801609cad415e69c20ed3988967d0de99 /tools/perf/scripts/python/stackcollapse.py | |
| parent | f48303122d2fd94b719e546cf8a39d412c7eee69 (diff) | |
| download | linux-e164835a0270cc01c93794536027cc70cd00d0ff.tar.xz | |
ASoC: dwc: add quirk for different register offset
DWC in ACP 2.x IP has different offsets for I2S_COMP_PARAM_* registers.
Added a quirk to support the same.
Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions