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| author | Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> | 2021-10-25 06:10:37 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-01-06 04:12:31 +0300 |
| commit | b4cbe606dc3674b25cb661e7cd1a1c6ddaaafaaa (patch) | |
| tree | c558657127dc3d53e6c8edc15936b4b87feb52c1 /tools/perf/scripts/python/stackcollapse.py | |
| parent | ffa81a03267b450cb8c7bc0d327c05c99de579a4 (diff) | |
| download | linux-b4cbe606dc3674b25cb661e7cd1a1c6ddaaafaaa.tar.xz | |
clk: visconti: Add support common clock driver and reset driver
Add support for common interface of the common clock and reset driver
for Toshiba Visconti5 and its SoC, TMPV7708. The PIPLLCT provides the PLL,
and the PISMU provides clock and reset functionality.
Each drivers are provided in this patch.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20211025031038.4180686-4-nobuhiro1.iwamatsu@toshiba.co.jp
[sboyd@kernel.org: Add bitfield.h include to pll.c]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions